From cfe60025ab06c73c44ce6b962a258668b3a90431 Mon Sep 17 00:00:00 2001
From: Yann Herklotz <git@yannherklotz.com>
Date: Thu, 24 Nov 2022 22:27:15 +0000
Subject: Move all files

---
 riscv/example.pcf | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 riscv/example.pcf

(limited to 'riscv/example.pcf')

diff --git a/riscv/example.pcf b/riscv/example.pcf
new file mode 100644
index 0000000..6d6ff81
--- /dev/null
+++ b/riscv/example.pcf
@@ -0,0 +1,38 @@
+# This is a partial constraints file for ButterStick r1.0,
+# produced based on
+# https://github.com/butterstick-fpga/butterstick-bootloader/blob/main/gateware/rtl/platform/butterstick_r1d0.py
+# All mistakes mine, Tommy Thorn, 2021
+
+LOCATE COMP "clk" SITE "B12";
+IOBUF PORT "clk" IO_TYPE=LVCMOS18;
+FREQUENCY PORT "clk" 30.0 MHz;
+
+LOCATE COMP "rst_n" SITE "R3";
+IOBUF PORT "rst_n" IO_TYPE=LVCMOS33 OPENDRAIN=ON;
+
+LOCATE COMP "user_btn[0]" SITE "U16";
+IOBUF PORT "user_btn[0]" IO_TYPE=SSTL135_I;
+
+LOCATE COMP "user_btn[1]" SITE "T17";
+IOBUF PORT "user_btn[1]" IO_TYPE=SSTL135_I;
+
+LOCATE COMP "LED0" SITE "C13";
+IOBUF PORT "LED0" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED1" SITE "D12";
+IOBUF PORT "LED1" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED2" SITE "U2";
+IOBUF PORT "LED2" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED3" SITE "T3";
+IOBUF PORT "LED3" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED4" SITE "D13";
+IOBUF PORT "LED4" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED5" SITE "E13";
+IOBUF PORT "LED5" IO_TYPE=LVCMOS33;
+LOCATE COMP "LED6" SITE "C16";
+IOBUF PORT "LED6" IO_TYPE=LVCMOS33;
+LOCATE COMP "colour[0]" SITE "T1";
+IOBUF PORT "colour[0]" IO_TYPE=LVCMOS33;
+LOCATE COMP "colour[1]" SITE "R1";
+IOBUF PORT "colour[1]" IO_TYPE=LVCMOS33;
+LOCATE COMP "colour[2]" SITE "U1";
+IOBUF PORT "colour[2]" IO_TYPE=LVCMOS33;
\ No newline at end of file
-- 
cgit