From 4413c27d6c6a3d69df34955d9d453c38b32174c7 Mon Sep 17 00:00:00 2001 From: "nicolas.nardino" Date: Thu, 17 Jun 2021 15:38:13 +0200 Subject: Add option to set thresold and support for riscv --- driver/Clflags.ml | 1 + driver/Driver.ml | 2 ++ riscV/Machregsaux.ml | 2 ++ scheduling/InstructionScheduler.ml | 9 +++++++-- 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/driver/Clflags.ml b/driver/Clflags.ml index fa17c2d9..1f31bd3e 100644 --- a/driver/Clflags.ml +++ b/driver/Clflags.ml @@ -115,4 +115,5 @@ let option_inline_auto_threshold = ref 0 let option_profile_arcs = ref false let option_fbranch_probabilities = ref true let option_debug_compcert = ref 0 +let option_regpres_threshold = ref 5 let main_function_name = ref "main" diff --git a/driver/Driver.ml b/driver/Driver.ml index 5a8c7f2c..fa187f26 100644 --- a/driver/Driver.ml +++ b/driver/Driver.ml @@ -211,6 +211,7 @@ Processing options: -fprepass Perform prepass scheduling (only on some architectures) [on] -fprepass= Perform postpass scheduling with the specified optimization [list] (=list: list scheduling, =revlist: reverse list scheduling, =regpres: list scheduling aware of register pressure, =zigzag: zigzag scheduling, =ilp: ILP, =greedy: just packing bundles) + -regpres-threshold n With `-fprepass= regpres`, set threshold value for number of free registers before trying to decrease register pressure -fpostpass Perform postpass scheduling (only for K1 architecture) [on] -fpostpass= Perform postpass scheduling with the specified optimization [list] (=list: list scheduling, =ilp: ILP, =greedy: just packing bundles) @@ -342,6 +343,7 @@ let cmdline_actions = Exact "-fprofile-use=", String (fun s -> Profilingaux.load_profiling_info s); Exact "-finline-auto-threshold", Integer (fun n -> option_inline_auto_threshold := n); Exact "-debug-compcert", Integer (fun n -> option_debug_compcert := n); + Exact "-regpres-threshold", Integer (fun n -> option_regpres_threshold := n); Exact "-fsmall-data", Integer(fun n -> option_small_data := n); Exact "-fsmall-const", Integer(fun n -> option_small_const := n); Exact "-ffloat-const-prop", Integer(fun n -> option_ffloatconstprop := n); diff --git a/riscV/Machregsaux.ml b/riscV/Machregsaux.ml index 840943e7..e3e47946 100644 --- a/riscV/Machregsaux.ml +++ b/riscV/Machregsaux.ml @@ -18,3 +18,5 @@ let class_of_type = function | AST.Tint | AST.Tlong -> 0 | AST.Tfloat | AST.Tsingle -> 1 | AST.Tany32 | AST.Tany64 -> assert false + +let nr_regs = [| 26; 32|] diff --git a/scheduling/InstructionScheduler.ml b/scheduling/InstructionScheduler.ml index df8a4e4e..5b4c87f4 100644 --- a/scheduling/InstructionScheduler.ml +++ b/scheduling/InstructionScheduler.ml @@ -360,8 +360,13 @@ let reg_pres_scheduler (problem : problem) : solution option = let nr_types_regs = Array.length available_regs in - let regs_thresholds = Array.init nr_types_regs - (fun i -> 5) in + let thres = Array.fold_left (min) + (max !(Clflags.option_regpres_threshold) 0) + Machregsaux.nr_regs + in + + + let regs_thresholds = Array.make nr_types_regs thres in (* placeholder value *) let class_r r = -- cgit