From af97fca0f1d824f3becf9c6895f44ad234e262f8 Mon Sep 17 00:00:00 2001 From: "nicolas.nardino" Date: Tue, 6 Jul 2021 15:32:35 +0200 Subject: Add debug info --- scheduling/InstructionScheduler.ml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/scheduling/InstructionScheduler.ml b/scheduling/InstructionScheduler.ml index a881df68..4fdc455c 100644 --- a/scheduling/InstructionScheduler.ml +++ b/scheduling/InstructionScheduler.ml @@ -502,6 +502,8 @@ let reg_pres_scheduler (problem : problem) : solution option = * flush stdout; *) if avlregs <= regs_thresholds.(i) then ( + if !Clflags.option_debug_compcert > 6 then + DebugPrint.debug "REGPRES: high pres class %d\n" i; let maybe = InstrSet.sched_CSR i ready usages in (* print_string "maybe\n"; * print_int maybe; -- cgit