From 6e4f49f7b8154d21c2c42f9978e6829d7a22a1de Mon Sep 17 00:00:00 2001 From: David Monniaux Date: Wed, 16 Sep 2020 07:52:57 +0200 Subject: starting to move common files --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index ba8add27..baccc9ab 100644 --- a/Makefile +++ b/Makefile @@ -23,7 +23,7 @@ endif BACKENDLIB?=Asmgenproof0.v Asmgenproof1.v -DIRS=lib common $(ARCHDIRS) backend cfrontend driver \ +DIRS=lib lib/Impure common $(ARCHDIRS) backend cfrontend driver \ flocq/Core flocq/Prop flocq/Calc flocq/IEEE754 \ exportclight MenhirLib cparser -- cgit From 93f9aa39b2885f98bf2be89583102d5c7f4c6f22 Mon Sep 17 00:00:00 2001 From: David Monniaux Date: Wed, 16 Sep 2020 09:13:59 +0200 Subject: just missing OpWeights for AARCH64 --- Makefile | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index baccc9ab..adbfb661 100644 --- a/Makefile +++ b/Makefile @@ -23,11 +23,11 @@ endif BACKENDLIB?=Asmgenproof0.v Asmgenproof1.v -DIRS=lib lib/Impure common $(ARCHDIRS) backend cfrontend driver \ +DIRS=lib lib/Impure common $(ARCHDIRS) scheduling backend cfrontend driver \ flocq/Core flocq/Prop flocq/Calc flocq/IEEE754 \ exportclight MenhirLib cparser -RECDIRS=lib common $(ARCHDIRS) backend cfrontend driver flocq exportclight \ +RECDIRS=lib common $(ARCHDIRS) scheduling backend cfrontend driver flocq exportclight \ MenhirLib cparser COQINCLUDES=$(foreach d, $(RECDIRS), -R $(d) $(subst /,.,compcert.$(d))) @@ -60,7 +60,9 @@ VLIB=Axioms.v Coqlib.v Intv.v Maps.v Heaps.v Lattice.v Ordered.v \ HashedSet.v \ Iteration.v Zbits.v Integers.v Archi.v IEEE754_extra.v Floats.v \ Parmov.v UnionFind.v Wfsimpl.v \ - Postorder.v FSetAVLplus.v IntvSets.v Decidableplus.v BoolEqual.v + Postorder.v FSetAVLplus.v IntvSets.v Decidableplus.v BoolEqual.v \ + ImpConfig.v ImpExtern.v ImpIO.v ImpMonads.v \ + ImpCore.v ImpHCons.v ImpLoops.v ImpPrelude.v # Parts common to the front-ends and the back-end (in common/) @@ -111,6 +113,13 @@ BACKEND=\ Asm.v Asmgen.v Asmgenproof.v Asmaux.v \ $(BACKENDLIB) +SCHEDULING= \ + RTLpathLivegenproof.v RTLpathSE_impl_junk.v \ + RTLpathLivegen.v RTLpathSE_impl.v \ + RTLpathproof.v RTLpathSE_theory.v \ + RTLpathSchedulerproof.v RTLpath.v \ + RTLpathScheduler.v + # C front-end modules (in cfrontend/) CFRONTEND=Ctypes.v Cop.v Csyntax.v Csem.v Ctyping.v Cstrategy.v Cexec.v \ @@ -136,7 +145,7 @@ DRIVER=Compopts.v Compiler.v Complements.v # All source files -FILES=$(VLIB) $(COMMON) $(BACKEND) $(CFRONTEND) $(DRIVER) $(FLOCQ) \ +FILES=$(VLIB) $(COMMON) $(BACKEND) $(SCHEDULING) $(CFRONTEND) $(DRIVER) $(FLOCQ) \ $(MENHIRLIB) $(PARSER) # Generated source files -- cgit From 99d46d24e0282c3e4c5fe8765f4e755a1b3b0253 Mon Sep 17 00:00:00 2001 From: David Monniaux Date: Thu, 1 Oct 2020 10:42:22 +0200 Subject: ccomp.force target for forcing compilation without Coq processing --- Makefile | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Makefile') diff --git a/Makefile b/Makefile index adbfb661..5fc3997b 100644 --- a/Makefile +++ b/Makefile @@ -188,6 +188,10 @@ ccomp: .depend.extr compcert.ini driver/Version.ml FORCE ccomp.byte: .depend.extr compcert.ini driver/Version.ml FORCE $(MAKE) -f Makefile.extr ccomp.byte +# DM force compilation without checking dependencies +ccomp.force: .depend.extr compcert.ini driver/Version.ml FORCE + $(MAKE) -f Makefile.extr ccomp.force + clightgen: .depend.extr compcert.ini exportclight/Clightdefs.vo driver/Version.ml FORCE $(MAKE) -f Makefile.extr clightgen clightgen.byte: .depend.extr compcert.ini exportclight/Clightdefs.vo driver/Version.ml FORCE -- cgit From db3183cacb132d7153f653e2c3ae20b92ddfc03c Mon Sep 17 00:00:00 2001 From: Sylvain Boulmé Date: Sat, 17 Oct 2020 15:43:14 +0200 Subject: fixing the move of the verified prepass scheduler into scheduling/ directory --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 5fc3997b..73b3a446 100644 --- a/Makefile +++ b/Makefile @@ -114,7 +114,7 @@ BACKEND=\ $(BACKENDLIB) SCHEDULING= \ - RTLpathLivegenproof.v RTLpathSE_impl_junk.v \ + RTLpathLivegenproof.v RTLpathSE_simu_specs.v \ RTLpathLivegen.v RTLpathSE_impl.v \ RTLpathproof.v RTLpathSE_theory.v \ RTLpathSchedulerproof.v RTLpath.v \ -- cgit