From 4dfcd7d4be18e8bc437ca170782212aa06635a95 Mon Sep 17 00:00:00 2001 From: Bernhard Schommer Date: Fri, 13 Dec 2019 18:16:06 +0100 Subject: Remove `__builtin_nop` for some architectures. (#208) The `__builtin_nop` function is documented only for PowerPC. It was added to the other architectures by copy paste, but has no known uses. So, remove `__builtin_nop` from all architectures but PowerPC. --- arm/Asm.v | 2 -- arm/AsmToJSON.ml | 3 +-- arm/Asmexpand.ml | 2 -- arm/TargetPrinter.ml | 2 -- 4 files changed, 1 insertion(+), 8 deletions(-) (limited to 'arm') diff --git a/arm/Asm.v b/arm/Asm.v index 194074ac..7f447c76 100644 --- a/arm/Asm.v +++ b/arm/Asm.v @@ -232,7 +232,6 @@ Inductive instruction : Type := | Prev16: ireg -> ireg -> instruction (**r reverse bytes and reverse bits. *) | Prsc: ireg -> ireg -> shift_op -> instruction (**r reverse subtract without carry. *) | Psbc: ireg -> ireg -> shift_op -> instruction (**r add with carry *) - | Pnop : instruction (**r nop instruction *) (* Add, sub, rsb versions with s suffix *) | Padds: ireg -> ireg -> shift_op -> instruction (**r integer addition with update of condition flags *) | Psubs: ireg -> ireg -> shift_op -> instruction (**r integer subtraction with update of condition flags *) @@ -815,7 +814,6 @@ Definition exec_instr (f: function) (i: instruction) (rs: regset) (m: mem) : out | Pfsqrt _ _ | Prsc _ _ _ | Psbc _ _ _ - | Pnop | Padds _ _ _ | Psubs _ _ _ | Prsbs _ _ _ diff --git a/arm/AsmToJSON.ml b/arm/AsmToJSON.ml index e850fed6..599d3d7b 100644 --- a/arm/AsmToJSON.ml +++ b/arm/AsmToJSON.ml @@ -34,7 +34,7 @@ let mnemonic_names = StringSet.of_list "Pfuitos"; "Pinlineasm"; "Pisb"; "Plabel"; "Pldr"; "Ploadsymbol_lbl"; "Pldr_p"; "Pldrb"; "Pldrb_p"; "Pldrh"; "Pldrh_p"; "Pldrsb"; "Pldrsh"; "Plsl"; "Plsr"; "Pmla"; "Pmov"; "Pmovite"; "Pfmovite"; "Pmovt"; "Pmovw"; - "Pmul"; "Pmvn"; "Ploadsymbol_imm"; "Pnop"; "Porr"; "Ppush"; "Prev"; + "Pmul"; "Pmvn"; "Ploadsymbol_imm"; "Porr"; "Ppush"; "Prev"; "Prev16"; "Prsb"; "Prsbs"; "Prsc"; "Psbc"; "Psbfx"; "Psdiv"; "Psmull"; "Pstr"; "Pstr_p"; "Pstrb"; "Pstrb_p"; "Pstrh"; "Pstrh_p"; "Psub"; "Psubs"; "Pudiv";"Pumull" ] @@ -268,7 +268,6 @@ let pp_instructions pp ic = | Pmovw(r1, n) -> instruction pp "Pmovw" [Ireg r1; Long n] | Pmul(r1, r2, r3) -> instruction pp "Pmul" [Ireg r1; Ireg r2; Ireg r3] | Pmvn(r1, so) -> instruction pp "Pmvn" [Ireg r1; Shift so] - | Pnop -> instruction pp "Pnop" [] | Porr(r1, r2, so) -> instruction pp "Porr" [Ireg r1; Ireg r2; Shift so] | Ppush(rl) -> instruction pp "Ppush" (List.map (fun r -> Ireg r) rl) | Prev(r1, r2) -> instruction pp "Prev" [Ireg r1; Ireg r2] diff --git a/arm/Asmexpand.ml b/arm/Asmexpand.ml index 89aab5c7..5c7e5ad4 100644 --- a/arm/Asmexpand.ml +++ b/arm/Asmexpand.ml @@ -409,8 +409,6 @@ let expand_builtin_inline name args res = (* Vararg stuff *) | "__builtin_va_start", [BA(IR a)], _ -> expand_builtin_va_start a - | "__builtin_nop", [], _ -> - emit Pnop (* Catch-all *) | _ -> raise (Error ("unrecognized builtin " ^ name)) diff --git a/arm/TargetPrinter.ml b/arm/TargetPrinter.ml index 03e06a65..c19f36b0 100644 --- a/arm/TargetPrinter.ml +++ b/arm/TargetPrinter.ml @@ -306,8 +306,6 @@ struct fprintf oc " vsqrt.f64 %a, %a\n" freg f1 freg f2 | Psbc (r1,r2,sa) -> fprintf oc " sbc %a, %a, %a\n" ireg r1 ireg r2 shift_op sa - | Pnop -> - fprintf oc " nop\n" | Pstr(r1, r2, sa) | Pstr_a(r1, r2, sa) -> fprintf oc " str %a, [%a, %a]\n" ireg r1 ireg r2 shift_op sa | Pstrb(r1, r2, sa) -> -- cgit From 7077c2ea9e86f001e805d7a2a5e7fcdfd0a8ece8 Mon Sep 17 00:00:00 2001 From: Bernhard Schommer Date: Thu, 2 Jan 2020 14:58:37 +0100 Subject: Revert "Remove `__builtin_nop` for some architectures. (#208)" This reverts commit 4dfcd7d4be18e8bc437ca170782212aa06635a95. --- arm/Asm.v | 2 ++ arm/AsmToJSON.ml | 3 ++- arm/Asmexpand.ml | 2 ++ arm/TargetPrinter.ml | 2 ++ 4 files changed, 8 insertions(+), 1 deletion(-) (limited to 'arm') diff --git a/arm/Asm.v b/arm/Asm.v index 7f447c76..194074ac 100644 --- a/arm/Asm.v +++ b/arm/Asm.v @@ -232,6 +232,7 @@ Inductive instruction : Type := | Prev16: ireg -> ireg -> instruction (**r reverse bytes and reverse bits. *) | Prsc: ireg -> ireg -> shift_op -> instruction (**r reverse subtract without carry. *) | Psbc: ireg -> ireg -> shift_op -> instruction (**r add with carry *) + | Pnop : instruction (**r nop instruction *) (* Add, sub, rsb versions with s suffix *) | Padds: ireg -> ireg -> shift_op -> instruction (**r integer addition with update of condition flags *) | Psubs: ireg -> ireg -> shift_op -> instruction (**r integer subtraction with update of condition flags *) @@ -814,6 +815,7 @@ Definition exec_instr (f: function) (i: instruction) (rs: regset) (m: mem) : out | Pfsqrt _ _ | Prsc _ _ _ | Psbc _ _ _ + | Pnop | Padds _ _ _ | Psubs _ _ _ | Prsbs _ _ _ diff --git a/arm/AsmToJSON.ml b/arm/AsmToJSON.ml index 599d3d7b..e850fed6 100644 --- a/arm/AsmToJSON.ml +++ b/arm/AsmToJSON.ml @@ -34,7 +34,7 @@ let mnemonic_names = StringSet.of_list "Pfuitos"; "Pinlineasm"; "Pisb"; "Plabel"; "Pldr"; "Ploadsymbol_lbl"; "Pldr_p"; "Pldrb"; "Pldrb_p"; "Pldrh"; "Pldrh_p"; "Pldrsb"; "Pldrsh"; "Plsl"; "Plsr"; "Pmla"; "Pmov"; "Pmovite"; "Pfmovite"; "Pmovt"; "Pmovw"; - "Pmul"; "Pmvn"; "Ploadsymbol_imm"; "Porr"; "Ppush"; "Prev"; + "Pmul"; "Pmvn"; "Ploadsymbol_imm"; "Pnop"; "Porr"; "Ppush"; "Prev"; "Prev16"; "Prsb"; "Prsbs"; "Prsc"; "Psbc"; "Psbfx"; "Psdiv"; "Psmull"; "Pstr"; "Pstr_p"; "Pstrb"; "Pstrb_p"; "Pstrh"; "Pstrh_p"; "Psub"; "Psubs"; "Pudiv";"Pumull" ] @@ -268,6 +268,7 @@ let pp_instructions pp ic = | Pmovw(r1, n) -> instruction pp "Pmovw" [Ireg r1; Long n] | Pmul(r1, r2, r3) -> instruction pp "Pmul" [Ireg r1; Ireg r2; Ireg r3] | Pmvn(r1, so) -> instruction pp "Pmvn" [Ireg r1; Shift so] + | Pnop -> instruction pp "Pnop" [] | Porr(r1, r2, so) -> instruction pp "Porr" [Ireg r1; Ireg r2; Shift so] | Ppush(rl) -> instruction pp "Ppush" (List.map (fun r -> Ireg r) rl) | Prev(r1, r2) -> instruction pp "Prev" [Ireg r1; Ireg r2] diff --git a/arm/Asmexpand.ml b/arm/Asmexpand.ml index 5c7e5ad4..89aab5c7 100644 --- a/arm/Asmexpand.ml +++ b/arm/Asmexpand.ml @@ -409,6 +409,8 @@ let expand_builtin_inline name args res = (* Vararg stuff *) | "__builtin_va_start", [BA(IR a)], _ -> expand_builtin_va_start a + | "__builtin_nop", [], _ -> + emit Pnop (* Catch-all *) | _ -> raise (Error ("unrecognized builtin " ^ name)) diff --git a/arm/TargetPrinter.ml b/arm/TargetPrinter.ml index c19f36b0..03e06a65 100644 --- a/arm/TargetPrinter.ml +++ b/arm/TargetPrinter.ml @@ -306,6 +306,8 @@ struct fprintf oc " vsqrt.f64 %a, %a\n" freg f1 freg f2 | Psbc (r1,r2,sa) -> fprintf oc " sbc %a, %a, %a\n" ireg r1 ireg r2 shift_op sa + | Pnop -> + fprintf oc " nop\n" | Pstr(r1, r2, sa) | Pstr_a(r1, r2, sa) -> fprintf oc " str %a, [%a, %a]\n" ireg r1 ireg r2 shift_op sa | Pstrb(r1, r2, sa) -> -- cgit From 9475c5637c5d650f43955abe8f995797893affe1 Mon Sep 17 00:00:00 2001 From: David Monniaux Date: Tue, 14 Jan 2020 23:37:20 +0100 Subject: ARM generation of 2-instruction signed division by 2 (as opposed to 3-instruction) --- arm/Asmgen.v | 3 +++ arm/Asmgenproof1.v | 24 +++++++++++++++++++++--- 2 files changed, 24 insertions(+), 3 deletions(-) (limited to 'arm') diff --git a/arm/Asmgen.v b/arm/Asmgen.v index 1a1e7f2f..0ec0a4d0 100644 --- a/arm/Asmgen.v +++ b/arm/Asmgen.v @@ -481,6 +481,9 @@ Definition transl_op do r <- ireg_of res; do r1 <- ireg_of a1; if Int.eq n Int.zero then OK (Pmov r (SOreg r1) :: k) + else if Int.eq n Int.one then + OK (Padd IR14 r1 (SOlsr r1 (Int.repr 31)) :: + Pmov r (SOasr IR14 n) :: k) else OK (Pmov IR14 (SOasr r1 (Int.repr 31)) :: Padd IR14 r1 (SOlsr IR14 (Int.sub Int.iwordsize n)) :: diff --git a/arm/Asmgenproof1.v b/arm/Asmgenproof1.v index 807e069d..2b125cda 100644 --- a/arm/Asmgenproof1.v +++ b/arm/Asmgenproof1.v @@ -1264,15 +1264,32 @@ Local Transparent destroyed_by_op. destruct (rs x0) eqn: X0; simpl in H0; try discriminate. destruct (Int.ltu i (Int.repr 31)) eqn: LTU; inv H0. revert EQ2. predSpec Int.eq Int.eq_spec i Int.zero; intros EQ2. + { (* i = 0 *) inv EQ2. econstructor. split. apply exec_straight_one. simpl. reflexivity. auto. split. Simpl. unfold Int.shrx. rewrite Int.shl_zero. unfold Int.divs. change (Int.signed Int.one) with 1. rewrite Z.quot_1_r. rewrite Int.repr_signed. auto. intros. Simpl. - (* i <> 0 *) - inv EQ2. - assert (LTU': Int.ltu (Int.sub Int.iwordsize i) Int.iwordsize = true). + } + { (* i <> 0 *) + revert EQ2. predSpec Int.eq Int.eq_spec i Int.one; intros EQ2. + { + inv EQ2. + econstructor; split. + eapply exec_straight_two; simpl; reflexivity. + split. + { rewrite X0. + rewrite Int.shrx1_shr by reflexivity. + Simpl. + } + { intros. + Simpl. + } + } + clear H0. + inv EQ2. + assert (LTU': Int.ltu (Int.sub Int.iwordsize i) Int.iwordsize = true). { generalize (Int.ltu_inv _ _ LTU). intros. unfold Int.sub, Int.ltu. rewrite Int.unsigned_repr_wordsize. @@ -1306,6 +1323,7 @@ Local Transparent destroyed_by_op. rewrite LTU'; simpl. rewrite LTU''; simpl. f_equal. symmetry. apply Int.shrx_shr_2. assumption. intros. unfold rs3; Simpl. unfold rs2; Simpl. unfold rs1; Simpl. + } (* intoffloat *) econstructor; split. apply exec_straight_one; simpl. rewrite H0; simpl. eauto. auto. Transparent destroyed_by_op. -- cgit