From be4d6e42dfa287b93b1a35ec820ab2a5aaf8c7ec Mon Sep 17 00:00:00 2001 From: xleroy Date: Sun, 19 May 2013 09:54:40 +0000 Subject: Merge of the float32 branch: - added RTL type "Tsingle" - ABI-compatible passing of single-precision floats on ARM and x86 git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2260 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e --- backend/IRC.ml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'backend/IRC.ml') diff --git a/backend/IRC.ml b/backend/IRC.ml index 573c3d72..79d66b9c 100644 --- a/backend/IRC.ml +++ b/backend/IRC.ml @@ -245,7 +245,13 @@ type graph = { let num_register_classes = 2 -let class_of_type = function Tint -> 0 | Tfloat -> 1 | Tlong -> assert false +let class_of_type = function + | Tint -> 0 + | Tfloat | Tsingle -> 1 + | Tlong -> assert false + +let type_of_class c = + if c = 0 then Tint else Tfloat let reserved_registers = ref ([]: mreg list) @@ -860,7 +866,7 @@ let assign_color g n = n.color <- Some loc | None -> (* Last, pick a Local stack slot *) - n.color <- Some (find_slot slot_conflicts n.typ) + n.color <- Some (find_slot slot_conflicts (type_of_class n.regclass)) (* Extract the location of a variable *) @@ -877,7 +883,7 @@ let location_of_var g v = with Not_found -> match ty with | Tint -> R dummy_int_reg - | Tfloat -> R dummy_float_reg + | Tfloat | Tsingle -> R dummy_float_reg | Tlong -> assert false (* The exported interface *) -- cgit