From 426881cde464691b61c5c49cf5038d21aace75fe Mon Sep 17 00:00:00 2001 From: Xavier Leroy Date: Tue, 21 Apr 2015 10:21:06 +0200 Subject: Support for GCC-style extended asm, continued: - support "r", "m" and "i" constraints - support "%Q" and "%R" modifiers for register pairs - support register clobbers - split off analysis and transformation of asm statements in cparser/ExtendedAsm.ml --- backend/Regalloc.ml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'backend/Regalloc.ml') diff --git a/backend/Regalloc.ml b/backend/Regalloc.ml index 3a7f5d99..c286e946 100644 --- a/backend/Regalloc.ml +++ b/backend/Regalloc.ml @@ -510,6 +510,9 @@ let add_interfs_live g live v = let add_interfs_list g v vl = List.iter (IRC.add_interf g v) vl +let add_interfs_list_mreg g vl mr = + List.iter (fun v -> IRC.add_interf g v (L (R mr))) vl + let rec add_interfs_pairwise g = function | [] -> () | v1 :: vl -> add_interfs_list g v1 vl; add_interfs_pairwise g vl @@ -578,7 +581,20 @@ let add_interfs_instr g instr live = add_interfs_pairwise g res; add_interfs_destroyed g across (destroyed_by_builtin ef); begin match ef, args, res with - | EF_annot_val _, [arg], [res] -> IRC.add_pref g arg res (* like a move *) + | EF_annot_val _, [arg], [res] -> + (* like a move *) + IRC.add_pref g arg res + | EF_inline_asm(txt, sg, clob), _, _ -> + (* clobbered regs interfere with live set + and also with res and args for GCC compatibility *) + List.iter (fun c -> + match Machregsaux.register_by_name (extern_atom c) with + | None -> () + | Some mr -> + add_interfs_destroyed g across [mr]; + add_interfs_list_mreg g args mr; + if sg.sig_res <> None then add_interfs_list_mreg g res mr) + clob | _ -> () end | Xannot(ef, args) -> -- cgit