From f995bde28d1098b51f42a38f3577b903d0420688 Mon Sep 17 00:00:00 2001 From: xleroy Date: Sat, 13 Jul 2013 14:02:07 +0000 Subject: More accurate model of condition register flags for ARM and IA32. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2297 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e --- lib/Floats.v | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'lib/Floats.v') diff --git a/lib/Floats.v b/lib/Floats.v index 7ae1705c..94c19d25 100644 --- a/lib/Floats.v +++ b/lib/Floats.v @@ -453,6 +453,12 @@ Proof. now apply cmp_le_lt_eq. Qed. +Theorem cmp_lt_gt_false: + forall f1 f2, cmp Clt f1 f2 = true -> cmp Cgt f1 f2 = true -> False. +Proof. + unfold cmp; intros; destruct (order_float f1 f2) as [ [] | ]; discriminate. +Qed. + (** Properties of conversions to/from in-memory representation. The double-precision conversions are bijective (one-to-one). The single-precision conversions lose precision exactly -- cgit