From 41109bd86942b028240ac20758ff29853b025534 Mon Sep 17 00:00:00 2001
From: Cyril SIX <cyril.six@kalray.eu>
Date: Tue, 12 Feb 2019 16:24:56 +0100
Subject: Added Osingleofint

---
 mppa_k1c/PostpassSchedulingOracle.ml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'mppa_k1c/PostpassSchedulingOracle.ml')

diff --git a/mppa_k1c/PostpassSchedulingOracle.ml b/mppa_k1c/PostpassSchedulingOracle.ml
index b5f74a6d..2338da91 100644
--- a/mppa_k1c/PostpassSchedulingOracle.ml
+++ b/mppa_k1c/PostpassSchedulingOracle.ml
@@ -34,6 +34,7 @@ let arith_rr_str = function
   | Pfnegd -> "Pfnegd"
   | Psxwd -> "Psxwd"
   | Pzxwd -> "Pzxwd"
+  | Pfloatwrnsz -> "Pfloatwrnsz"
 
 let arith_rrr_str = function
   | Pcompw it -> "Pcompw"
@@ -343,7 +344,7 @@ type real_instruction =
   (* BCU *)
   | Icall | Call | Cb | Igoto | Goto | Ret | Get | Set
   (* FPU *)
-  | Fnegd
+  | Fnegd | Floatwz
 
 let ab_inst_to_real = function
   | "Paddw" | "Paddiw" | "Pcvtl2w" -> Addw
@@ -370,6 +371,7 @@ let ab_inst_to_real = function
   | "Pnop" | "Pcvtw2l" -> Nop
   | "Psxwd" -> Sxwd
   | "Pzxwd" -> Zxwd
+  | "Pfloatwrnsz" -> Floatwz
 
   | "Plb" -> Lbs
   | "Plbu" -> Lbz
@@ -431,6 +433,7 @@ let rec_to_usage r =
   | Nop -> alu_nop
   | Sraw | Srlw | Sllw | Srad | Srld | Slld -> (match encoding with None | Some U6 -> alu_tiny | _ -> raise InvalidEncoding)
   | Sxwd | Zxwd -> (match encoding with None -> alu_lite | _ -> raise InvalidEncoding)
+  | Floatwz -> mau
   | Lbs | Lbz | Lhs | Lhz | Lws | Ld -> 
       (match encoding with None | Some U6 | Some S10 -> lsu_data 
                           | Some U27L5 | Some U27L10 -> lsu_data_x 
@@ -449,6 +452,7 @@ let real_inst_to_latency = function
   | Addd | Andd | Compd | Ord | Sbfd | Srad | Srld | Slld | Xord | Make
   | Sxwd | Zxwd
         -> 1
+  | Floatwz -> 4
   | Mulw | Muld -> 2 (* FIXME - WORST CASE. If it's S10 then it's only 1 *)
   | Lbs | Lbz | Lhs | Lhz | Lws | Ld
   | Sb | Sh | Sw | Sd 
-- 
cgit