From a8f9909dda3a6f1f997721b753057030575c3c4e Mon Sep 17 00:00:00 2001
From: David Monniaux <david.monniaux@univ-grenoble-alpes.fr>
Date: Thu, 22 Oct 2020 13:26:00 +0200
Subject: allow changing the target core

---
 riscV/PrepassSchedulingOracleDeps.ml | 1 +
 1 file changed, 1 insertion(+)
 create mode 120000 riscV/PrepassSchedulingOracleDeps.ml

(limited to 'riscV/PrepassSchedulingOracleDeps.ml')

diff --git a/riscV/PrepassSchedulingOracleDeps.ml b/riscV/PrepassSchedulingOracleDeps.ml
new file mode 120000
index 00000000..1e955b85
--- /dev/null
+++ b/riscV/PrepassSchedulingOracleDeps.ml
@@ -0,0 +1 @@
+../aarch64/PrepassSchedulingOracleDeps.ml
\ No newline at end of file
-- 
cgit