From 21aaf9c53b2bb0c6d376c2ce436d6dd7f5442a47 Mon Sep 17 00:00:00 2001 From: David Monniaux Date: Mon, 1 Feb 2021 18:53:04 +0100 Subject: bits to float --- riscV/TargetPrinter.ml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'riscV/TargetPrinter.ml') diff --git a/riscV/TargetPrinter.ml b/riscV/TargetPrinter.ml index 1f02ca71..4bcfa6af 100644 --- a/riscV/TargetPrinter.ml +++ b/riscV/TargetPrinter.ml @@ -396,6 +396,10 @@ module Target : TARGET = fprintf oc " fmv.x.s %a, %a\n" ireg rd freg fs | Pfmvxd (rd,fs) -> fprintf oc " fmv.x.d %a, %a\n" ireg rd freg fs + | Pfmvsx (fd,rs) -> + fprintf oc " fmv.s.x %a, %a\n" freg fd ireg rs + | Pfmvdx (fd,rs) -> + fprintf oc " fmv.d.x %a, %a\n" freg fd ireg rs (* 32-bit (single-precision) floating point *) | Pfls (fd, ra, ofs) -> -- cgit