From c3ce32da7d431069ef355296bef66b112a302b78 Mon Sep 17 00:00:00 2001 From: Léo Gourdin Date: Tue, 20 Jul 2021 12:32:21 +0200 Subject: op simplify BTL intro --- x86/BTL_SEsimplify.v | 1 + 1 file changed, 1 insertion(+) create mode 120000 x86/BTL_SEsimplify.v (limited to 'x86') diff --git a/x86/BTL_SEsimplify.v b/x86/BTL_SEsimplify.v new file mode 120000 index 00000000..f190e6d5 --- /dev/null +++ b/x86/BTL_SEsimplify.v @@ -0,0 +1 @@ +../aarch64/BTL_SEsimplify.v \ No newline at end of file -- cgit From a3319eb05543930844dedd9ac31ed1beaac3047e Mon Sep 17 00:00:00 2001 From: Léo Gourdin Date: Tue, 20 Jul 2021 15:21:29 +0200 Subject: Fix compile on ARM/x86 backends --- x86/PrepassSchedulingOracle.ml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'x86') diff --git a/x86/PrepassSchedulingOracle.ml b/x86/PrepassSchedulingOracle.ml index 7b6a1b14..31b4ea5b 100644 --- a/x86/PrepassSchedulingOracle.ml +++ b/x86/PrepassSchedulingOracle.ml @@ -1,5 +1,3 @@ -open RTL -open Registers (* Do not do anything *) -let schedule_sequence (seqa : (instruction*Regset.t) array) = None +let schedule_sequence inst btl = None -- cgit