From 7998ccfd709b97f1a2306df4570365d58a5bb4b5 Mon Sep 17 00:00:00 2001
From: xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>
Date: Sun, 12 Jan 2014 10:48:56 +0000
Subject: - Back to origins: suppress Mfloat64al32 chunk and align Mfloat64 to
 4. - Revised printing of intermediate RTL code.

git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2403 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
---
 arm/PrintAsm.ml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'arm/PrintAsm.ml')

diff --git a/arm/PrintAsm.ml b/arm/PrintAsm.ml
index 99dfa467..01b881f7 100644
--- a/arm/PrintAsm.ml
+++ b/arm/PrintAsm.ml
@@ -350,7 +350,7 @@ let print_builtin_vload_common oc chunk args res =
   | Mfloat32, [IR addr], [FR res] ->
       fprintf oc "	flds	%a, [%a, #0]\n" freg_single res ireg addr;
       fprintf oc "	fcvtds	%a, %a\n" freg res freg_single res; 2
-  | (Mfloat64 | Mfloat64al32), [IR addr], [FR res] ->
+  | Mfloat64, [IR addr], [FR res] ->
       fprintf oc "	fldd	%a, [%a, #0]\n" freg res ireg addr; 1
   | _ ->
       assert false
@@ -381,7 +381,7 @@ let print_builtin_vstore_common oc chunk args =
   | Mfloat32, [IR  addr; FR src] ->
       fprintf oc "	fcvtsd	%a, %a\n" freg_single FR6 freg src;
       fprintf oc "	fsts	%a, [%a, #0]\n" freg_single FR6 ireg addr; 2
-  | (Mfloat64 | Mfloat64al32), [IR  addr; FR src] ->
+  | Mfloat64, [IR  addr; FR src] ->
       fprintf oc "	fstd	%a, [%a, #0]\n" freg src ireg addr; 1
   | _ ->
       assert false
-- 
cgit