From a6e44cd88d2b37a7747d5057d04834c0deaa6601 Mon Sep 17 00:00:00 2001 From: Bernhard Schommer Date: Mon, 9 Jan 2023 15:53:30 +0100 Subject: Change preference for new register in allocator Currently, the register allocator picks caller-save registers in preference to callee-save registers. But for ARM in Thumb mode, more compact code is obtained if we prefer integer registers R0...R3 rather than all integer caller-save registers. This commit introduces an `allocatable_registers` function in $ARCH/Conventions1.v that determines the preferred and remaining registers to be used for register allocation. --- extraction/extraction.v | 1 + 1 file changed, 1 insertion(+) (limited to 'extraction/extraction.v') diff --git a/extraction/extraction.v b/extraction/extraction.v index e52a06ee..a714c831 100644 --- a/extraction/extraction.v +++ b/extraction/extraction.v @@ -167,6 +167,7 @@ Separate Extraction Conventions1.int_caller_save_regs Conventions1.float_caller_save_regs Conventions1.int_callee_save_regs Conventions1.float_callee_save_regs Conventions1.dummy_int_reg Conventions1.dummy_float_reg + Conventions1.allocatable_registers RTL.instr_defs RTL.instr_uses Machregs.mregs_for_operation Machregs.mregs_for_builtin Machregs.two_address_op Machregs.is_stack_reg -- cgit