From a6e44cd88d2b37a7747d5057d04834c0deaa6601 Mon Sep 17 00:00:00 2001 From: Bernhard Schommer Date: Mon, 9 Jan 2023 15:53:30 +0100 Subject: Change preference for new register in allocator Currently, the register allocator picks caller-save registers in preference to callee-save registers. But for ARM in Thumb mode, more compact code is obtained if we prefer integer registers R0...R3 rather than all integer caller-save registers. This commit introduces an `allocatable_registers` function in $ARCH/Conventions1.v that determines the preferred and remaining registers to be used for register allocation. --- riscV/Conventions1.v | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'riscV') diff --git a/riscV/Conventions1.v b/riscV/Conventions1.v index eeaae3c4..2e2cedab 100644 --- a/riscV/Conventions1.v +++ b/riscV/Conventions1.v @@ -89,6 +89,23 @@ Definition is_float_reg (r: mreg) := | F24 | F25 | F26 | F27 | F28 | F29 | F30 | F31 => true end. +(** How to use registers for register allocation. + We favor the use of caller-save registers, using callee-save registers + only when no caller-save is available. *) + +Record alloc_regs := mk_alloc_regs { + preferred_int_regs: list mreg; + remaining_int_regs: list mreg; + preferred_float_regs: list mreg; + remaining_float_regs: list mreg +}. + +Definition allocatable_registers (_: unit) := + {| preferred_int_regs := int_caller_save_regs; + remaining_int_regs := int_callee_save_regs; + preferred_float_regs := float_caller_save_regs; + remaining_float_regs := float_callee_save_regs |}. + (** * Function calling conventions *) (** The functions in this section determine the locations (machine registers -- cgit