From 9a3143dad1b119250d0553562a436f5f5f57269b Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Fri, 17 Sep 2021 17:06:28 +0100 Subject: Replace omega by lia --- verilog/ConstpropOpproof.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'verilog/ConstpropOpproof.v') diff --git a/verilog/ConstpropOpproof.v b/verilog/ConstpropOpproof.v index 6d2df9c1..c0bdaa76 100644 --- a/verilog/ConstpropOpproof.v +++ b/verilog/ConstpropOpproof.v @@ -532,7 +532,7 @@ Proof. Int.bit_solve. destruct (zlt i0 n0). replace (Int.testbit n i0) with (negb (Int.testbit Int.zero i0)). rewrite Int.bits_zero. simpl. rewrite andb_true_r. auto. - rewrite <- EQ. rewrite Int.bits_zero_ext by omega. rewrite zlt_true by auto. + rewrite <- EQ. rewrite Int.bits_zero_ext by lia. rewrite zlt_true by auto. rewrite Int.bits_not by auto. apply negb_involutive. rewrite H6 by auto. auto. econstructor; split; eauto. auto. -- cgit