From 9bf2fcb4102c19b8cab939b303a8ee28070a8eaa Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 13:10:43 -0600 Subject: gitignore: update to ignore verilator artifacts Signed-off-by: Austin Seipp --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index 71fa228..487adcc 100644 --- a/.gitignore +++ b/.gitignore @@ -29,6 +29,7 @@ /testbench.gtkw /testbench.vcd /testbench.trace +/testbench_verilator* /check.smt2 /check.vcd /synth.log -- cgit From 42b7477ba7be2e66ec0ce31a5892ca88e57c5f06 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 13:11:02 -0600 Subject: Add shell.nix for Nix-based PicoRV32 development The net result of this is that cd'ing into the main source directory and running: $ nix-shell will get you every tool needed to immediately do RISC-V development with picorv32 or picosoc (assuming you're targeting ICE40 or ECP5). The shell.nix file contains many comments on how to use the resulting environment. Signed-off-by: Austin Seipp --- shell.nix | 139 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 139 insertions(+) create mode 100644 shell.nix diff --git a/shell.nix b/shell.nix new file mode 100644 index 0000000..92ec1ff --- /dev/null +++ b/shell.nix @@ -0,0 +1,139 @@ +# nix.shell: PicoRV32 Development Environment +# +# This file allows you to use the Nix Package Manager (https://nixos.org/nix) +# in order to download, install, and prepare a working environment for doing +# PicoRV32/PicoSoC development on _any_ existing Linux distribution, provided +# the Nix package manager is installed. +# +# Current included tools: +# +# - Synthesis: Recent Yosys and SymbiYosys +# - Place and Route: arachne-pnr and nextpnr (ICE40, ECP5, Python, no GUI) +# - Packing: Project IceStorm (Trellis tools may be included later?) +# - SMT Solvers: Z3 4.7.x, Yices 2.6.x, and Boolector 3.0.x +# - Verification: Recent Verilator, Recent (unreleased) Icarus Verilog +# - A bare-metal RISC-V cross compiler toolchain, based on GCC 8.2.x +# +# With these tools, you can immediately begin development, simulation, firmware +# hacking, etc with almost no need to fiddle with recent tools yourself. Almost +# all of the tools will be downloaded on-demand (except the GCC toolchain) +# meaning you don't have to compile any recent tools yourself. Due to the +# "hermetic" nature of Nix, these packages should also work on practically any +# Linux distribution, as well. +# +# (This environment should also be suitable for running riscv-formal test +# harnesses on PicoRV32, as well. In fact it is probably useful for almost +# _any_ RTL implementation of the RV32I core.) +# +# Usage +# ----- +# +# At the top-level of the picorv32 directory, simply run the 'nix-shell' command, +# which will then drop you into a bash prompt: +# +# +# $ nix-shell +# ... +# [nix-shell:~/src/picorv32]$ +# +# +# When you run 'nix-shell', you will automatically begin downloading all of the +# various tools you need from an upstream "cache", so most of this will execute +# very quickly. However, this may take a while, as you will at least have to +# build a cross-compiled RISC-V toolchain, which may take some time. (These +# binaries are not available from the cache, so they must be built by you.) Once +# you have done this once, you do not need to do it again. +# +# At this point, once you are inside the shell, you can begin running tests +# like normal. For example, to run the Verilator tests with the included test +# firmware, which is substantially faster than Icarus: +# +# [nix-shell:~/src/picorv32]$ make test_verilator TOOLCHAIN_PREFIX=riscv32-unknown-elf- +# ... +# +# +# Note that you must override TOOLCHAIN_PREFIX (in the top-level Makefile, it +# looks in /opt by default). +# +# This will work immediately with no extra fiddling necessary. You can also run +# formal verification tests using a provided SMT solver, for example, yices and +# boolector (Z3 is not used since it does not complete in a reasonable amount +# of time for these examples): +# +# [nix-shell:~/src/picorv32]$ make check-yices check-boolector +# ... +# +# You can also run the PicoSoC tests and build bitstreams. To run the +# simulation tests and then build bitstreams for the HX8K and IceBreaker +# boards: +# +# [nix-shell:~/src/picorv32]$ cd picosoc/ +# [nix-shell:~/src/picorv32/picosoc]$ make hx8ksynsim icebsynsim +# ... +# [nix-shell:~/src/picorv32/picosoc]$ make hx8kdemo.bin icebreaker.bin +# ... +# +# The HX8K simulation and IceBreaker simulation will be synthesized with Yosys +# and then run with Icarus Verilog. The bitstreams for HX8K and IceBreaker will +# be P&R'd with arachne-pnr and nextpnr, respectively. +# + +{ architecture ? "rv32imc" +}: + +# TODO FIXME: fix this to a specific version of nixpkgs. +# ALSO: maybe use cachix to make it easier for contributors(?) +with import {}; + +let + # risc-v toolchain source code. TODO FIXME: this should be replaced with + # upstream versions of GCC. in the future we could also include LLVM (the + # upstream nixpkgs LLVM expression should be built with it in time) + riscv-toolchain-ver = "8.2.0"; + riscv-src = pkgs.fetchFromGitHub { + owner = "riscv"; + repo = "riscv-gnu-toolchain"; + rev = "c3ad5556197e374c25bc475ffc9285b831f869f8"; + sha256 = "1j9y3ai42xzzph9rm116sxfzhdlrjrk4z0v4yrk197j72isqyxbc"; + fetchSubmodules = true; + }; + + # given an architecture like 'rv32i', this will generate the given + # toolchain derivation based on the above source code. + make-riscv-toolchain = arch: + stdenv.mkDerivation rec { + name = "riscv-${arch}-toolchain-${version}"; + version = "${riscv-toolchain-ver}-${builtins.substring 0 7 src.rev}"; + src = riscv-src; + + configureFlags = [ "--with-arch=${arch}" ]; + installPhase = ":"; # 'make' installs on its own + hardeningDisable = [ "all" ]; + enableParallelBuilding = true; + + # Stripping/fixups break the resulting libgcc.a archives, somehow. + # Maybe something in stdenv that does this... + dontStrip = true; + dontFixup = true; + + nativeBuildInputs = with pkgs; [ curl gawk texinfo bison flex gperf ]; + buildInputs = with pkgs; [ libmpc mpfr gmp expat ]; + }; + + riscv-toolchain = make-riscv-toolchain architecture; + + # These are all the packages that will be available inside the nix-shell + # environment. + buildInputs = with pkgs; + # these are generally useful packages for tests, verification, synthesis + # and deployment, etc + [ python3 gcc + yosys symbiyosys nextpnr arachne-pnr icestorm + z3 boolector yices + verilog verilator + # also include the RISC-V toolchain + riscv-toolchain + ]; + +# Export a usable shell environment +in runCommand "picorv32-shell" { inherit buildInputs; } "" -- cgit From 070367c88df0e89e1810ecab378acb3841675cf4 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 14:20:38 -0600 Subject: scripts/icestorm: touch up Makefile a bit This touches up the Makefile so that it: - uses $@, $< and $^ in more places for brevity and robustness (typo guards, etc) - tracks dependencies slightly better (e.g. .pcf file changes weren't tracked before) Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 57 +++++++++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 29 deletions(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index b86995f..7527a70 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -4,64 +4,64 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- all: example.bin firmware.elf: firmware.S firmware.c firmware.lds - $(TOOLCHAIN_PREFIX)gcc -Os -ffreestanding -nostdlib -o firmware.elf firmware.S firmware.c \ + $(TOOLCHAIN_PREFIX)gcc -Os -ffreestanding -nostdlib -o $@ firmware.S firmware.c \ --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc - chmod -x firmware.elf + chmod -x $@ firmware.bin: firmware.elf - $(TOOLCHAIN_PREFIX)objcopy -O binary firmware.elf firmware.bin - chmod -x firmware.bin + $(TOOLCHAIN_PREFIX)objcopy -O binary $< $@ + chmod -x $@ firmware.hex: firmware.bin - python3 ../../firmware/makehex.py firmware.bin 128 > firmware.hex + python3 ../../firmware/makehex.py $< 128 > $@ synth.blif: example.v ../../picorv32.v firmware.hex yosys -v3 -l synth.log -p 'synth_ice40 -top top -blif $@; write_verilog -attr2comment synth.v' $(filter %.v, $^) -example.asc: synth.blif - arachne-pnr -d 8k -o example.asc -p example.pcf synth.blif +example.asc: synth.blif example.pcf + arachne-pnr -d 8k -o $@ -p example.pcf $< example.bin: example.asc - icepack example.asc example.bin + icepack $< $@ -example_tb.vvp: example_tb.v example.v firmware.hex - iverilog -o example_tb.vvp -s testbench example.v example_tb.v ../../picorv32.v - chmod -x example_tb.vvp +example_tb.vvp: example.v example_tb.v ../../picorv32.v firmware.hex + iverilog -o $@ -s testbench $(filter %.v, $^) + chmod -x $@ example_sim: example_tb.vvp - vvp -N example_tb.vvp + vvp -N $< example_sim_vcd: example_tb.vvp - vvp -N example_tb.vvp +vcd + vvp -N $< +vcd synth_tb.vvp: example_tb.v synth.blif - iverilog -o synth_tb.vvp -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` - chmod -x synth_tb.vvp + iverilog -o $@ -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` + chmod -x $@ synth_sim: synth_tb.vvp - vvp -N synth_tb.vvp + vvp -N $< synth_sim_vcd: synth_tb.vvp - vvp -N synth_tb.vvp +vcd + vvp -N $< +vcd -route.v: example.asc - icebox_vlog -L -n top -sp example.pcf example.asc > route.v +route.v: example.asc example.pcf + icebox_vlog -L -n top -sp example.pcf $< > $@ -route_tb.vvp: example_tb.v route.v - iverilog -o route_tb.vvp -s testbench route.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` - chmod -x route_tb.vvp +route_tb.vvp: route.v example_tb.v + iverilog -o $@ -s testbench $^ `yosys-config --datdir/ice40/cells_sim.v` + chmod -x $@ route_sim: route_tb.vvp - vvp -N route_tb.vvp + vvp -N $< route_sim_vcd: route_tb.vvp - vvp -N route_tb.vvp +vcd + vvp -N $< +vcd -prog_sram: - iceprog -S example.bin +prog_sram: example.bin + iceprog -S $< -view: - gtkwave example.vcd example.gtkw +view: example.vcd + gtkwave $< example.gtkw clean: rm -f firmware.elf firmware.map firmware.bin firmware.hex @@ -71,4 +71,3 @@ clean: .PHONY: all prog_sram view clean .PHONY: example_sim synth_sim route_sim .PHONY: example_sim_vcd synth_sim_vcd route_sim_vcd - -- cgit From fc71cadda4310b081fb0dd08b5afdd3270e868f2 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 14:32:34 -0600 Subject: scripts/icestorm: switch to nextpnr-ice40 nextpnr-ice40 gives a better fMAX for this design (by about ~9Mhz for me: ~59MHz -> ~68MHz) and is The Way Of The Future. Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index 7527a70..ea4efff 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -15,11 +15,11 @@ firmware.bin: firmware.elf firmware.hex: firmware.bin python3 ../../firmware/makehex.py $< 128 > $@ -synth.blif: example.v ../../picorv32.v firmware.hex - yosys -v3 -l synth.log -p 'synth_ice40 -top top -blif $@; write_verilog -attr2comment synth.v' $(filter %.v, $^) +synth.json: example.v ../../picorv32.v firmware.hex + yosys -v3 -l synth.log -p 'synth_ice40 -top top -json $@; write_verilog -attr2comment synth.v' $(filter %.v, $^) -example.asc: synth.blif example.pcf - arachne-pnr -d 8k -o $@ -p example.pcf $< +example.asc: synth.json example.pcf + nextpnr-ice40 --hx8k --package ct256 --json $< --pcf example.pcf --asc $@ example.bin: example.asc icepack $< $@ @@ -34,7 +34,7 @@ example_sim: example_tb.vvp example_sim_vcd: example_tb.vvp vvp -N $< +vcd -synth_tb.vvp: example_tb.v synth.blif +synth_tb.vvp: example_tb.v synth.json iverilog -o $@ -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` chmod -x $@ @@ -65,7 +65,7 @@ view: example.vcd clean: rm -f firmware.elf firmware.map firmware.bin firmware.hex - rm -f synth.log synth.v synth.blif route.v example.asc example.bin + rm -f synth.log synth.v synth.json route.v example.asc example.bin rm -f example_tb.vvp synth_tb.vvp route_tb.vvp example.vcd .PHONY: all prog_sram view clean -- cgit From 4900ebb6938a7f1720bc5f765c1e7f31ffd35407 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 14:54:29 -0600 Subject: scripts/icestorm: force -march=rv32i The IceStorm example core doesn't include compressed instructions or the MULT extension; it is an rv32i core, not rv32i[m|c]. If the given riscv32 toolchain is not explicitly told to generate rv32i code for the firmware, it may generate invalid instructions which cause a trap during simulation or on the hardware itself (although CATCH_ILLINSN is set to zero in this case, too). Luckily, any rv32i* toolchain (rv32imc for example) can fit the bill here -- there's no use of libgcc or anything (which might introduce illegal instructions generated previously) so just forcing the compiler to generate the right code works nicely. Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index ea4efff..e2771b1 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -4,7 +4,7 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- all: example.bin firmware.elf: firmware.S firmware.c firmware.lds - $(TOOLCHAIN_PREFIX)gcc -Os -ffreestanding -nostdlib -o $@ firmware.S firmware.c \ + $(TOOLCHAIN_PREFIX)gcc -march=rv32i -Os -ffreestanding -nostdlib -o $@ firmware.S firmware.c \ --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc chmod -x $@ -- cgit From d711ce527eaa8965a1a530f020230db84da0437e Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 15:07:49 -0600 Subject: scripts/icestorm: add 'timing' target This dumps a simple IceTime report for the bitstream; we fix the device package to CT256, corresponding to the HX8K. Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index e2771b1..7ead63c 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -1,4 +1,3 @@ - TOOLCHAIN_PREFIX = riscv32-unknown-elf- all: example.bin @@ -60,6 +59,9 @@ route_sim_vcd: route_tb.vvp prog_sram: example.bin iceprog -S $< +timing: example.asc example.pcf + icetime -c 12 -tmd hx8k -P ct256 -p example.pcf -t $< + view: example.vcd gtkwave $< example.gtkw @@ -69,5 +71,5 @@ clean: rm -f example_tb.vvp synth_tb.vvp route_tb.vvp example.vcd .PHONY: all prog_sram view clean -.PHONY: example_sim synth_sim route_sim +.PHONY: example_sim synth_sim route_sim timing .PHONY: example_sim_vcd synth_sim_vcd route_sim_vcd -- cgit From 752790a4d7fe79d6ec068923c2c6cc1706a8cb38 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 15:44:24 -0600 Subject: scripts/icestorm: comments only Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index 7ead63c..7a3ece3 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -2,6 +2,9 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- all: example.bin +## ------------------- +## firmware generation + firmware.elf: firmware.S firmware.c firmware.lds $(TOOLCHAIN_PREFIX)gcc -march=rv32i -Os -ffreestanding -nostdlib -o $@ firmware.S firmware.c \ --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc @@ -14,6 +17,9 @@ firmware.bin: firmware.elf firmware.hex: firmware.bin python3 ../../firmware/makehex.py $< 128 > $@ +## ------------------------------ +## main flow: synth/p&r/bitstream + synth.json: example.v ../../picorv32.v firmware.hex yosys -v3 -l synth.log -p 'synth_ice40 -top top -json $@; write_verilog -attr2comment synth.v' $(filter %.v, $^) @@ -23,6 +29,9 @@ example.asc: synth.json example.pcf example.bin: example.asc icepack $< $@ +## ----------------- +## icarus simulation + example_tb.vvp: example.v example_tb.v ../../picorv32.v firmware.hex iverilog -o $@ -s testbench $(filter %.v, $^) chmod -x $@ @@ -33,6 +42,9 @@ example_sim: example_tb.vvp example_sim_vcd: example_tb.vvp vvp -N $< +vcd +## --------------------- +## post-synth simulation + synth_tb.vvp: example_tb.v synth.json iverilog -o $@ -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` chmod -x $@ @@ -43,6 +55,9 @@ synth_sim: synth_tb.vvp synth_sim_vcd: synth_tb.vvp vvp -N $< +vcd +## --------------------- +## post-route simulation + route.v: example.asc example.pcf icebox_vlog -L -n top -sp example.pcf $< > $@ @@ -56,6 +71,9 @@ route_sim: route_tb.vvp route_sim_vcd: route_tb.vvp vvp -N $< +vcd +## --------------------- +## miscellaneous targets + prog_sram: example.bin iceprog -S $< @@ -65,6 +83,9 @@ timing: example.asc example.pcf view: example.vcd gtkwave $< example.gtkw +## ------ +## el fin + clean: rm -f firmware.elf firmware.map firmware.bin firmware.hex rm -f synth.log synth.v synth.json route.v example.asc example.bin -- cgit From 2944564ba803dbd4635e02a7a17f62e6dfeeefc3 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 15:14:32 -0600 Subject: scripts/icestorm: move SHIFT_COUNTER_BITS into Makefile This makes it easier to build separate bitstreams for simulation targets vs the real bitstream for hardware, without editing any source code. Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 10 ++++++++-- scripts/icestorm/firmware.c | 5 +++-- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index 7a3ece3..eead7df 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -1,13 +1,19 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- +# set to 4 for simulation +FIRMWARE_COUNTER_BITS=18 + all: example.bin ## ------------------- ## firmware generation firmware.elf: firmware.S firmware.c firmware.lds - $(TOOLCHAIN_PREFIX)gcc -march=rv32i -Os -ffreestanding -nostdlib -o $@ firmware.S firmware.c \ - --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc + $(TOOLCHAIN_PREFIX)gcc \ + -DSHIFT_COUNTER_BITS=$(FIRMWARE_COUNTER_BITS) \ + -march=rv32i -Os -ffreestanding -nostdlib \ + -o $@ firmware.S firmware.c \ + --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc chmod -x $@ firmware.bin: firmware.elf diff --git a/scripts/icestorm/firmware.c b/scripts/icestorm/firmware.c index a5e5236..80a4661 100644 --- a/scripts/icestorm/firmware.c +++ b/scripts/icestorm/firmware.c @@ -1,7 +1,8 @@ #include -// use SHIFT_COUNTER_BITS=4 for simulation -#define SHIFT_COUNTER_BITS 18 +#ifndef SHIFT_COUNTER_BITS +#error SHIFT_COUNTER_BITS must be defined as 4 (for simulation) or 18 (for hardware bitstreams)! +#endif void output(uint8_t c) { -- cgit From 13a9edf12251049b2c64746a5e76b9ede7ee6b31 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 15:49:32 -0600 Subject: scripts/icestorm: remove unneeded -lgcc This freestanding firmware doesn't need anything from the supporting toolchain. Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index eead7df..2337600 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -13,7 +13,7 @@ firmware.elf: firmware.S firmware.c firmware.lds -DSHIFT_COUNTER_BITS=$(FIRMWARE_COUNTER_BITS) \ -march=rv32i -Os -ffreestanding -nostdlib \ -o $@ firmware.S firmware.c \ - --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc + --std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug chmod -x $@ firmware.bin: firmware.elf -- cgit From 770b5bd4c6e9383e840319c69a64dfb47be833d4 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 15:55:56 -0600 Subject: scripts/icestorm: add readme Notes about how to build proper simulation vs hardware bitstreams. Signed-off-by: Austin Seipp --- scripts/icestorm/readme.md | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 scripts/icestorm/readme.md diff --git a/scripts/icestorm/readme.md b/scripts/icestorm/readme.md new file mode 100644 index 0000000..101391f --- /dev/null +++ b/scripts/icestorm/readme.md @@ -0,0 +1,12 @@ +To build the example LED-blinking firmware for an HX8K Breakout Board and get +a timing report (checked against the default 12MHz oscillator): + + $ make clean example.bin timing + +To run all the simulation tests: + + $ make clean example_sim synth_sim route_sim FIRMWARE_COUNTER_BITS=4 + +(You must run the `clean` target to rebuild the firmware with the updated +`FIRMWARE_COUNTER_BITS` parameter; the firmware source must be recompiled for +simulation vs hardware, but this is not tracked as a Makefile dependency.) -- cgit From af3b1bb75de312db5e7c3c840787b96b0e5853d9 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 16:49:18 -0600 Subject: scripts/icestorm: dedupe calls to yosys-config Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index 2337600..a9391fc 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -1,5 +1,7 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- +ICE40_SIM_CELLS=$(shell yosys-config --datdir/ice40/cells_sim.v) + # set to 4 for simulation FIRMWARE_COUNTER_BITS=18 @@ -52,7 +54,7 @@ example_sim_vcd: example_tb.vvp ## post-synth simulation synth_tb.vvp: example_tb.v synth.json - iverilog -o $@ -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` + iverilog -o $@ -s testbench synth.v example_tb.v $(ICE40_SIM_CELLS) chmod -x $@ synth_sim: synth_tb.vvp @@ -68,7 +70,7 @@ route.v: example.asc example.pcf icebox_vlog -L -n top -sp example.pcf $< > $@ route_tb.vvp: route.v example_tb.v - iverilog -o $@ -s testbench $^ `yosys-config --datdir/ice40/cells_sim.v` + iverilog -o $@ -s testbench $^ $(ICE40_SIM_CELLS) chmod -x $@ route_sim: route_tb.vvp -- cgit From 1c7f51ed60431b4297e8b844b57bf8c83bacf3e4 Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Fri, 11 Jan 2019 16:49:33 -0600 Subject: scripts/icestorm: check circuit @ 62MHz With arachne-pnr this circuit couldn't hit 60MHz, just barely under it. OTOH, nextpnr hits about ~68 MHz. So let's set it somewhere inbetween to make sure this is true over time! Signed-off-by: Austin Seipp --- scripts/icestorm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index a9391fc..7672b41 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -86,7 +86,7 @@ prog_sram: example.bin iceprog -S $< timing: example.asc example.pcf - icetime -c 12 -tmd hx8k -P ct256 -p example.pcf -t $< + icetime -c 62 -tmd hx8k -P ct256 -p example.pcf -t $< view: example.vcd gtkwave $< example.gtkw -- cgit From 672c99b71e16ace182b2d54819cd93916159d570 Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Mon, 11 Feb 2019 21:26:45 +0100 Subject: added echo command for testing simpleuart --- picosoc/firmware.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/picosoc/firmware.c b/picosoc/firmware.c index e3eed76..b53fa0e 100644 --- a/picosoc/firmware.c +++ b/picosoc/firmware.c @@ -550,6 +550,14 @@ void cmd_benchmark_all() } #endif +void cmd_echo() +{ + print("Return to menu by sending '!'\n\n"); + char c; + while ((c = getchar()) != '!') + putchar(c); +} + // -------------------------------------------------------- void main() @@ -611,6 +619,7 @@ void main() print(" [7] Toggle continuous read mode\n"); print(" [9] Run simplistic benchmark\n"); print(" [0] Benchmark all configs\n"); + print(" [e] Echo UART\n"); print("\n"); for (int rep = 10; rep > 0; rep--) @@ -650,6 +659,9 @@ void main() case '0': cmd_benchmark_all(); break; + case 'e': + cmd_echo(); + break; default: continue; } -- cgit From 017f5373173db4eadade63f96d50f19ed9966208 Mon Sep 17 00:00:00 2001 From: Steffen Vogel Date: Mon, 11 Feb 2019 21:39:15 +0100 Subject: add readme file for torture test (closes #93) --- scripts/torture/README | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 scripts/torture/README diff --git a/scripts/torture/README b/scripts/torture/README new file mode 100644 index 0000000..d62671d --- /dev/null +++ b/scripts/torture/README @@ -0,0 +1,6 @@ +Use UCB-BAR's RISC-V Torture Test Generator to test PicoRV32. + +You might need to install the following addition dependecies: + +sudo apt-get install python3-pip +pip3 install numpy -- cgit