From c10125eb5cb91968f724cea3092252159af207d7 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 2 Jul 2015 12:29:06 +0200 Subject: Added TWO_STAGE_SHIFT parameter --- README.md | 7 +++++++ picorv32.v | 5 ++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 808d351..03b0903 100644 --- a/README.md +++ b/README.md @@ -158,6 +158,13 @@ latches the value internally. This parameter is only available for the `picorv32` core. In the `picorv32_axi` core this is implicitly set to 0. +#### TWO_STAGE_SHIFT (default = 1) + +By default shift operations are performed in two stages: first shift in units +of 4 bits and then shift in units of 1 bit. This speeds up shift operations, +but adds additional hardware. Set this parameter to 0 to disable the two-stage +shift to further reduce the size of the core. + #### CATCH_MISALIGN (default = 1) Set this to 0 to disable the circuitry for catching misaligned memory diff --git a/picorv32.v b/picorv32.v index fbb0b37..9aba3c4 100644 --- a/picorv32.v +++ b/picorv32.v @@ -36,6 +36,7 @@ module picorv32 #( parameter [ 0:0] ENABLE_REGS_16_31 = 1, parameter [ 0:0] ENABLE_REGS_DUALPORT = 1, parameter [ 0:0] LATCHED_MEM_RDATA = 0, + parameter [ 0:0] TWO_STAGE_SHIFT = 1, parameter [ 0:0] CATCH_MISALIGN = 1, parameter [ 0:0] CATCH_ILLINSN = 1, parameter [ 0:0] ENABLE_PCPI = 0, @@ -885,7 +886,7 @@ module picorv32 #( reg_out <= reg_op1; mem_do_rinst <= mem_do_prefetch; cpu_state <= cpu_state_fetch; - end else if (reg_sh >= 4) begin + end else if (TWO_STAGE_SHIFT && reg_sh >= 4) begin (* parallel_case, full_case *) case (1'b1) instr_slli || instr_sll: reg_op1 <= reg_op1 << 4; @@ -1136,6 +1137,7 @@ module picorv32_axi #( parameter [ 0:0] ENABLE_COUNTERS = 1, parameter [ 0:0] ENABLE_REGS_16_31 = 1, parameter [ 0:0] ENABLE_REGS_DUALPORT = 1, + parameter [ 0:0] TWO_STAGE_SHIFT = 1, parameter [ 0:0] CATCH_MISALIGN = 1, parameter [ 0:0] CATCH_ILLINSN = 1, parameter [ 0:0] ENABLE_PCPI = 0, @@ -1230,6 +1232,7 @@ module picorv32_axi #( .ENABLE_COUNTERS (ENABLE_COUNTERS ), .ENABLE_REGS_16_31 (ENABLE_REGS_16_31 ), .ENABLE_REGS_DUALPORT(ENABLE_REGS_DUALPORT), + .TWO_STAGE_SHIFT (TWO_STAGE_SHIFT ), .CATCH_MISALIGN (CATCH_MISALIGN ), .CATCH_ILLINSN (CATCH_ILLINSN ), .ENABLE_PCPI (ENABLE_PCPI ), -- cgit