From f9da3f2ce822908225b6305ac7f01e1928fa43ad Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 14 Jul 2016 09:07:52 +0200
Subject: Minor fixes in scripts/icestorm/

---
 scripts/icestorm/Makefile     | 14 +++++++-------
 scripts/icestorm/example_tb.v |  8 ++++----
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile
index 74ba34d..2740da0 100644
--- a/scripts/icestorm/Makefile
+++ b/scripts/icestorm/Makefile
@@ -18,11 +18,11 @@ firmware.hex: firmware.bin
 synth.blif: example.v ../../picorv32.v firmware.hex
 	yosys -v3 -l synth.log -p 'synth_ice40 -top top -blif $@; write_verilog -attr2comment synth.v' $(filter %.v, $^)
 
-example.txt: synth.blif
-	arachne-pnr -d 8k -o example.txt -p example.pcf synth.blif
+example.asc: synth.blif
+	arachne-pnr -d 8k -o example.asc -p example.pcf synth.blif
 
-example.bin: example.txt
-	icepack example.txt example.bin
+example.bin: example.asc
+	icepack example.asc example.bin
 
 example_tb.vvp: example_tb.v example.v firmware.hex
 	iverilog -o example_tb.vvp -s testbench example.v example_tb.v ../../picorv32.v
@@ -44,8 +44,8 @@ synth_sim: synth_tb.vvp
 synth_sim_vcd: synth_tb.vvp
 	vvp -N synth_tb.vvp +vcd
 
-route.v: example.txt
-	icebox_vlog -L -n top -sp example.pcf example.txt > route.v
+route.v: example.asc
+	icebox_vlog -L -n top -sp example.pcf example.asc > route.v
 
 route_tb.vvp: example_tb.v route.v
 	iverilog -o route_tb.vvp -s testbench route.v example_tb.v /usr/local/share/yosys/ice40/cells_sim.v
@@ -65,7 +65,7 @@ view:
 
 clean:
 	rm -f firmware.elf firmware.map firmware.bin firmware.hex
-	rm -f synth.log synth.v synth.blif route.v example.txt example.bin
+	rm -f synth.log synth.v synth.blif route.v example.asc example.bin
 	rm -f example_tb.vvp synth_tb.vvp route_tb.vvp example.vcd
 
 .PHONY: all prog_sram view clean
diff --git a/scripts/icestorm/example_tb.v b/scripts/icestorm/example_tb.v
index db14aa9..f04f8f8 100644
--- a/scripts/icestorm/example_tb.v
+++ b/scripts/icestorm/example_tb.v
@@ -1,12 +1,12 @@
 `timescale 1 ns / 1 ps
 
 module testbench;
-	reg clk_pin = 1;
-	always #5 clk_pin = ~clk_pin;
+	reg clk = 1;
+	always #5 clk = ~clk;
 	wire LED0, LED1, LED2, LED3, LED4, LED5, LED6, LED7;
 
 	top uut (
-		.clk_pin(clk_pin),
+		.clk(clk),
 		.LED0(LED0),
 		.LED1(LED1),
 		.LED2(LED2),
@@ -24,7 +24,7 @@ module testbench;
 		end
 
 		$monitor(LED7, LED6, LED5, LED4, LED3, LED2, LED1, LED0);
-		repeat (10000) @(posedge clk_pin);
+		repeat (10000) @(posedge clk);
 		$finish;
 	end
 endmodule
-- 
cgit