From 117586ff199608e83aad73c1f0657fbe8584a9d3 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 23 Nov 2016 03:02:02 +0100 Subject: Added RISC-V Formal Interfcae (RVFI) --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 803605c..b1e3c66 100644 --- a/Makefile +++ b/Makefile @@ -41,11 +41,11 @@ test_synth: testbench_synth.vvp firmware/firmware.hex vvp -N testbench_synth.vvp testbench.vvp: testbench.v picorv32.v - iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) testbench.v picorv32.v + iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL testbench.v picorv32.v chmod -x testbench.vvp testbench_sp.vvp: testbench.v picorv32.v - iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST testbench.v picorv32.v + iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL -DSP_TEST testbench.v picorv32.v chmod -x testbench_sp.vvp testbench_synth.vvp: testbench.v synth.v -- cgit