From 8bfd7c166bbb770acc3a155e52274161af1f4e9f Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 3 Sep 2016 15:16:24 +0200 Subject: Added generic "make check-" rule --- Makefile | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index fb81b59..347fcb8 100644 --- a/Makefile +++ b/Makefile @@ -19,13 +19,11 @@ testbench.vcd: testbench.vvp firmware/firmware.hex view: testbench.vcd gtkwave $< testbench.gtkw -check-z3: check.smt2 - yosys-smtbmc -s z3 -t 30 --dump-vcd check.vcd check.smt2 - yosys-smtbmc -s z3 -t 30 --dump-vcd check.vcd -i check.smt2 +check: check-yices -check-yices: check.smt2 - yosys-smtbmc -s yices -t 30 --dump-vcd check.vcd check.smt2 - yosys-smtbmc -s yices -t 30 --dump-vcd check.vcd -i check.smt2 +check-%: check.smt2 + yosys-smtbmc -s $(subst check-,,$@) -t 30 --dump-vcd check.vcd check.smt2 + yosys-smtbmc -s $(subst check-,,$@) -t 30 --dump-vcd check.vcd -i check.smt2 check.smt2: picorv32.v yosys -v2 -p 'read_verilog -formal picorv32.v' \ @@ -137,5 +135,5 @@ clean: firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex firmware/firmware.map \ testbench.vvp testbench_sp.vvp testbench_synth.vvp testbench.vcd testbench.trace -.PHONY: test view test_sp test_axi test_synth check-z3 check-yices download-tools build-tools toc clean +.PHONY: test view test_sp test_axi test_synth download-tools build-tools toc clean -- cgit