From 8343315aa7879800ff6d6c3da16c96eb57fb447a Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Thu, 18 Feb 2016 21:26:18 +0100 Subject: Break out AXI4 memory to a separate module This commit also adds support for setting the AXI_TEST and VERBOSE defines as plusargs or parameters --- Makefile | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 5ded656..f02bda7 100644 --- a/Makefile +++ b/Makefile @@ -27,24 +27,20 @@ check.smt2: picorv32.v test_sp: testbench_sp.exe firmware/firmware.hex vvp -N testbench_sp.exe -test_axi: testbench_axi.exe firmware/firmware.hex - vvp -N testbench_axi.exe +test_axi: testbench.exe firmware/firmware.hex + vvp -N testbench.exe +axi_test test_synth: testbench_synth.exe firmware/firmware.hex vvp -N testbench_synth.exe -testbench.exe: testbench.v picorv32.v - iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v picorv32.v +testbench.exe: testbench.v axi4_memory.v picorv32.v + iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v axi4_memory.v picorv32.v chmod -x testbench.exe -testbench_sp.exe: testbench.v picorv32.v - iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v picorv32.v +testbench_sp.exe: testbench.v axi4_memory.v picorv32.v + iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v axi4_memory.v picorv32.v chmod -x testbench_sp.exe -testbench_axi.exe: testbench.v picorv32.v - iverilog -o testbench_axi.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DAXI_TEST testbench.v picorv32.v - chmod -x testbench_axi.exe - testbench_synth.exe: testbench.v synth.v iverilog -o testbench_synth.exe testbench.v synth.v chmod -x testbench_synth.exe @@ -81,7 +77,7 @@ toc: clean: rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) check.smt2 check.vcd synth.v synth.log \ firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex firmware/firmware.map \ - testbench.exe testbench_sp.exe testbench_axi.exe testbench_synth.exe testbench.vcd + testbench.exe testbench_sp.exe testbench_synth.exe testbench.vcd .PHONY: test view test_sp test_axi test_synth toc clean -- cgit From 9591ae9f7d4182463a2a3af2a51212d29f9781bf Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Thu, 18 Feb 2016 22:42:01 +0100 Subject: Split out verilator-incompatible code to top-level testbench Verilator doesn't handle verilog code that deals with time, such as delayed signals or the repeat task. Clock and reset generation are therefore moved to a separate file that can be replaced by a verilator module. VCD generation is also affected by this. --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index f02bda7..9daad19 100644 --- a/Makefile +++ b/Makefile @@ -33,12 +33,12 @@ test_axi: testbench.exe firmware/firmware.hex test_synth: testbench_synth.exe firmware/firmware.hex vvp -N testbench_synth.exe -testbench.exe: testbench.v axi4_memory.v picorv32.v - iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v axi4_memory.v picorv32.v +testbench.exe: testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v + iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v chmod -x testbench.exe -testbench_sp.exe: testbench.v axi4_memory.v picorv32.v - iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v axi4_memory.v picorv32.v +testbench_sp.exe: testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v + iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v chmod -x testbench_sp.exe testbench_synth.exe: testbench.v synth.v -- cgit From 714f7d9cfae594fe596522024dfdf4bc1c91f535 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 2 Mar 2016 12:50:52 +0100 Subject: Merged axi4_memory.v and picorv32_wrapper.v back into testbench.v --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 9daad19..5b2520f 100644 --- a/Makefile +++ b/Makefile @@ -33,12 +33,12 @@ test_axi: testbench.exe firmware/firmware.hex test_synth: testbench_synth.exe firmware/firmware.hex vvp -N testbench_synth.exe -testbench.exe: testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v - iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v +testbench.exe: testbench.v picorv32.v + iverilog -o testbench.exe $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) testbench.v picorv32.v chmod -x testbench.exe -testbench_sp.exe: testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v - iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v picorv32_wrapper.v axi4_memory.v picorv32.v +testbench_sp.exe: testbench.v picorv32.v + iverilog -o testbench_sp.exe $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST testbench.v picorv32.v chmod -x testbench_sp.exe testbench_synth.exe: testbench.v synth.v -- cgit