From 4101cfe8105c0442be88a938ca10b73ee08037b7 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 16 Sep 2016 13:15:21 +0200 Subject: Fixed the nontrivial compressed ISA bug found by tracecmp2 --- picorv32.v | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'picorv32.v') diff --git a/picorv32.v b/picorv32.v index f7ff31a..92df201 100644 --- a/picorv32.v +++ b/picorv32.v @@ -296,8 +296,9 @@ module picorv32 #( reg mem_do_rdata; reg mem_do_wdata; - reg mem_la_secondword; + reg mem_la_secondword, mem_la_firstword_reg, last_mem_valid; wire mem_la_firstword = COMPRESSED_ISA && (mem_do_prefetch || mem_do_rinst) && next_pc[1] && !mem_la_secondword; + wire mem_la_firstword_xfer = COMPRESSED_ISA && mem_xfer && (!last_mem_valid ? mem_la_firstword : mem_la_firstword_reg); reg prefetched_high_word; reg clear_prefetched_high_word; @@ -316,7 +317,7 @@ module picorv32 #( assign mem_la_write = resetn && !mem_state && mem_do_wdata; assign mem_la_read = resetn && ((!mem_la_use_prefetched_high_word && !mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) || (COMPRESSED_ISA && mem_xfer && mem_la_firstword && !mem_la_secondword && &mem_rdata_latched[1:0])); - assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + (mem_xfer && mem_la_firstword), 2'b00} : {reg_op1[31:2], 2'b00}; + assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + mem_la_firstword_xfer, 2'b00} : {reg_op1[31:2], 2'b00}; assign mem_rdata_latched_noshuffle = (mem_xfer || LATCHED_MEM_RDATA) ? mem_rdata : mem_rdata_q; @@ -324,6 +325,17 @@ module picorv32 #( COMPRESSED_ISA && mem_la_secondword ? {mem_rdata_latched_noshuffle[15:0], mem_16bit_buffer} : COMPRESSED_ISA && mem_la_firstword ? {16'bx, mem_rdata_latched_noshuffle[31:16]} : mem_rdata_latched_noshuffle; + always @(posedge clk) begin + if (!resetn) begin + mem_la_firstword_reg <= 0; + last_mem_valid <= 0; + end else begin + if (!last_mem_valid) + mem_la_firstword_reg <= mem_la_firstword; + last_mem_valid <= mem_valid && !mem_ready; + end + end + always @* begin (* full_case *) case (mem_wordsize) @@ -524,7 +536,7 @@ module picorv32 #( `assert(mem_valid == !mem_la_use_prefetched_high_word); `assert(mem_instr == (mem_do_prefetch || mem_do_rinst)); if (mem_xfer) begin - if (COMPRESSED_ISA && mem_la_read) begin + if (COMPRESSED_ISA && mem_la_read && (!last_mem_valid ? mem_la_firstword : mem_la_firstword_reg)) begin mem_valid <= 1; mem_la_secondword <= 1; if (!mem_la_use_prefetched_high_word) -- cgit