From 26d730dd81b74f4dbd2af37ca664227ebea3f00f Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sat, 12 Sep 2020 11:03:03 +0100 Subject: Add references --- conference.bib | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'conference.bib') diff --git a/conference.bib b/conference.bib index dbf355b..498385b 100644 --- a/conference.bib +++ b/conference.bib @@ -122,4 +122,32 @@ with {LegUp} High-Level Synthesis}, booktitle={Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation}, pages={335--346}, year={2012} -} \ No newline at end of file +} + +@article{perna12_mechan_wire_wise_verif_handel_c_synth, + author = "Juan Perna and Jim Woodcock", + title = {Mechanised Wire-Wise Verification of {Handel-C} Synthesis}, + journal = "Science of Computer Programming", + volume = 77, + number = 4, + pages = "424 - 443", + year = 2012, + doi = "10.1016/j.scico.2010.02.007", + issn = "0167-6423", +} + +@article{chouksey20_verif_sched_condit_behav_high_level_synth, + author = {R. {Chouksey} and C. {Karfa}}, + title = {Verification of Scheduling of Conditional Behaviors in + High-Level Synthesis}, + journal = {IEEE Transactions on Very Large Scale Integration (VLSI) + Systems}, + volume = {}, + number = {}, + pages = {1-14}, + year = {2020}, + doi = {10.1109/TVLSI.2020.2978242}, + url = {https://doi.org/10.1109/TVLSI.2020.2978242}, + ISSN = {1557-9999}, + month = {}, +} -- cgit