From 074d5cd5b077bbbe81e6cd1c48ae2a63e5b29c62 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 28 Sep 2021 23:49:46 +0100 Subject: Add presentation --- presentation/presentation.org | 45 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/presentation/presentation.org b/presentation/presentation.org index cce2850..3ea79ba 100644 --- a/presentation/presentation.org +++ b/presentation/presentation.org @@ -4,6 +4,51 @@ #+columns: %45ITEM %10BEAMER_ENV(Env) %10BEAMER_ACT(Act) %4BEAMER_COL(Col) #+setupfile: setup.org +** The Need to Design Hardware Accelerators + +Field-programmable gate arrays (FPGAs) becoming more popular as flexible hardware acceleration. + +Compared to microcontrollers: + +- Can greatly *reduce latency*. +- Lower *power*. +- *Higher performance*. + +But: + +- Needs knowledge about hardware design. +- *Less flexible*. + +** So How do we Program an FPGA? + +*** Code example :B_column: +:PROPERTIES: +:BEAMER_ENV: column +:BEAMER_COL: 0.4 +:END: + +*** Code example :B_column: +:PROPERTIES: +:BEAMER_ENV: column +:BEAMER_COL: 0.6 +:END: + +**** FPGA +:PROPERTIES: +:BEAMER_ENV: onlyenvNH +:END: + +**** Verilog +:PROPERTIES: +:BEAMER_ENV: onlyenvNH +:BEAMER_ACT: <3> +:END: +**** HLS +:PROPERTIES: +:BEAMER_ENV: onlyenvNH +:BEAMER_ACT: <3> +:END: + ** What is High-Level Synthesis *** High-Level Synthesis (HLS) -- cgit