From 529762c4fa9fee0ec38b3d227bc2613ffd51a922 Mon Sep 17 00:00:00 2001
From: Yann Herklotz <git@yannherklotz.com>
Date: Tue, 16 Jun 2020 20:21:33 +0100
Subject: Add loow reference

---
 references.bib | 26 ++++++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/references.bib b/references.bib
index 76f7911..81fe2c4 100644
--- a/references.bib
+++ b/references.bib
@@ -337,8 +337,8 @@
 
 @article{06_ieee_stand_veril_hardw_descr_languag,
   author          = {},
-  title           = {{IEEE} Standard for Verilog Hardware Description Language},
-  journal         = {{IEEE} Std 1364-2005 (Revision of IEEE Std 1364-2001)},
+  title           = {IEEE Standard for Verilog Hardware Description Language},
+  journal         = {IEEE Std 1364-2005 (Revision of IEEE Std 1364-2001)},
   volume          = {},
   number          = {},
   pages           = {1-590},
@@ -347,3 +347,25 @@
   ISSN            = {},
   month           = {April},
 }
+
+@inproceedings{loow19_verif_compil_verif_proces,
+  author =       {L\"{o}\"{o}w, Andreas and Kumar, Ramana and Tan, Yong Kiam and
+                  Myreen, Magnus O. and Norrish, Michael and Abrahamsson, Oskar
+                  and Fox, Anthony},
+  title =        {Verified Compilation on a Verified Processor},
+  tags =         {verification},
+  booktitle =    {Proceedings of the 40th ACM SIGPLAN Conference on Programming
+                  Language Design and Implementation},
+  year =         2019,
+  pages =        {1041--1053},
+  doi =          {10.1145/3314221.3314622},
+  acmid =        3314622,
+  address =      {New York, NY, USA},
+  isbn =         {978-1-4503-6712-7},
+  keywords =     {compiler verification, hardware verification, program
+                  verification, verified stack},
+  location =     {Phoenix, AZ, USA},
+  numpages =     13,
+  publisher =    {ACM},
+  series =       {PLDI 2019},
+}
-- 
cgit