From 7ccf35966e15de7daa30351ddde04663cab38e3c Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 30 Jun 2020 15:03:47 +0100 Subject: Add examples --- verilog_notes.tex | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'verilog_notes.tex') diff --git a/verilog_notes.tex b/verilog_notes.tex index b28b04f..60e21bb 100644 --- a/verilog_notes.tex +++ b/verilog_notes.tex @@ -1,3 +1,12 @@ +\ifCOMMENTS +\subsection{\textcolor{red!75!black}{Verilog notes}} +\JW{The `Skip' rule has an erroneous $=$.}\YH{Done} +\JW{You could use a bit of colour here, e.g. the keywords like `if' could be coloured for readability.}\YH{Done} +\JW{The difference between `s' and `st' is hard to remember, since both are prefixes of both `state' and `statement'! It's quite common to use `$\sigma$' for states, so you might consider `$s$' and `$\sigma$' for statements and states?}\YH{That is true, changed it to use $\sigma$.} + +\JW{The function update syntax is not familiar to me, but perhaps it is what is used in Coq? More typical would be `$\Delta[n\mapsto v]$'.}\YH{I was actually thinking of using a custom merge syntax using //, but that notation is better. I think I might still use // for merge, just need to explain it somewhere.} + +\fi -- cgit