\environment fonts_env \environment lsr_env \startcomponent pipelining \chapter[sec:pipelining]{Loop Pipelining} \startsynopsis This section describes the future plans of implementing loop pipelining in Vericert, also called loop scheduling. This addresses the final major issue with Vericert, which is efficiently handling loops. \stopsynopsis Standard instruction scheduling only addresses parallelisation inside hyperblocks, which are linear sections of code. However, loops are often the most critical sections in code, and scheduling only addresses parallelisation within one iteration. \section{Loop pipelining example} \startplacemarginfigure[location=here,reference={fig:pipelined-loop},title={Example of pipelining a loop.}] \startfloatcombination[nx=2] \startplacesubfigure[title={Simple loop containing an accumulation of values with an inter-iteration dependency.}] \startframedtext[frame=off,offset=none,width={0.6\textwidth}] \starthlC for (int i = 1; i < N; i++) { c1 = acc[i-1] * c; c2 = x[i] * y[i]; acc[i] = c1 + c2; } \stophlC \stopframedtext \stopplacesubfigure \startplacesubfigure[title={Pipelined loop reducing the number of dependencies inside of the loop.}] \startframedtext[frame=off,offset=none,width={0.6\textwidth}] \starthlC c1 = acc[0] * c; c2 = x[1] * y[1]; for (int i = 1; i < N-1; i++) { acc[i] = c1 + c2; c2 = x[i+1] * y[i+1]; c1 = acc[i+1] * c; } acc[N-1] = c1 + c2; \stophlC \stopframedtext \stopplacesubfigure \stopfloatcombination \stopplacemarginfigure \in{Figure}[fig:pipelined-loop] shows an example of pipelining a loop which accumulates values and modifies an array. In \in{Figure}{a}[fig:pipelined-loop], the body of the loop cannot be scheduled in less than three cycles, assuming that a load takes two clock cycles. However, after transforming the code into the pipelined version on the right \startmode[section] \section{Bibliography} \placelistofpublications \stopmode \stopcomponent