From e7cafecf3f8c43ed3302f09e000d4f8775356876 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Thu, 3 Sep 2020 09:02:52 +0100 Subject: Add fixes to run scheduling on compilation --- src/extraction/Extraction.v | 1 + 1 file changed, 1 insertion(+) (limited to 'src/extraction') diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index 9755125..6fc8545 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -175,6 +175,7 @@ Set Extraction AccessOpaque. Cd "src/extraction". Separate Extraction Verilog.module Value.uvalueToZ vericert.Compiler.transf_hls + vericert.Compiler.transf_hls_temp RTLBlockgen.transl_program RTLBlock.successors_instr Compiler.transf_c_program Compiler.transf_cminor_program -- cgit