From 56ea621762c865c1c71bdc7ad99afc4f2c291d5c Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sat, 7 Nov 2020 10:13:22 +0000 Subject: Update definition of Vneg --- src/hls/Verilog.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/hls') diff --git a/src/hls/Verilog.v b/src/hls/Verilog.v index c5dab9e..e5f86d5 100644 --- a/src/hls/Verilog.v +++ b/src/hls/Verilog.v @@ -149,7 +149,7 @@ Inductive binop : Type := (** ** Unary Operators *) Inductive unop : Type := -| Vneg (** negation ([~]) *) +| Vneg (** negation ([-]) *) | Vnot. (** not operation [!] *) (** ** Expressions *) -- cgit