From 0f9ab38389000edfa2376fabace69d2366d32647 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Fri, 12 Jun 2020 13:18:40 +0100 Subject: Fix declaring function arguments correctly --- src/verilog/PrintVerilog.ml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/verilog/PrintVerilog.ml') diff --git a/src/verilog/PrintVerilog.ml b/src/verilog/PrintVerilog.ml index d81bf18..700b8e3 100644 --- a/src/verilog/PrintVerilog.ml +++ b/src/verilog/PrintVerilog.ml @@ -180,8 +180,7 @@ let pprint_module i n m = concat [ indent i; "module "; (extern_atom n); "("; concat (intersperse ", " (List.map register (inputs @ outputs))); ");\n"; fold_map (pprint_module_item (i+1)) m.mod_body; - indent i; "endmodule\n\n"; - testbench + indent i; "endmodule\n\n" ] let print_result pp lst = @@ -201,4 +200,5 @@ let print_globdef pp (id, gd) = | _ -> () let print_program pp prog = - List.iter (print_globdef pp) prog.prog_defs + List.iter (print_globdef pp) prog.prog_defs; + pstr pp testbench -- cgit