From 817aea90deff7f381bf50d0cb7cbfc96c1c9ea7f Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Fri, 9 Jul 2021 20:11:46 +0200 Subject: Add docker file and some comments --- src/Compiler.v | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/Compiler.v') diff --git a/src/Compiler.v b/src/Compiler.v index 61adad1..268f451 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -214,6 +214,8 @@ Definition transf_hls (p : Csyntax.program) : res Verilog.program := .. coq:: none |*) +(* This is an unverified version of transf_hls with some experimental additions such as scheduling +that aren't completed yet. *) Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := OK p @@@ SimplExpr.transl_program -- cgit