From 2456ba0e08f91538feeb1403beb7de142a054ebe Mon Sep 17 00:00:00 2001
From: Yann Herklotz <git@yannherklotz.com>
Date: Mon, 2 Nov 2020 19:38:07 +0000
Subject: Add optimisations to output

---
 src/extraction/Extraction.v | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/extraction')

diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v
index 879e752..c2b3951 100644
--- a/src/extraction/Extraction.v
+++ b/src/extraction/Extraction.v
@@ -180,6 +180,7 @@ Cd "src/extraction".
 Separate Extraction
          Verilog.module Value.uvalueToZ vericert.Compiler.transf_hls
          vericert.Compiler.transf_hls_temp
+         vericert.Compiler.transf_hls_opt
          RTLBlockgen.transl_program RTLBlock.successors_instr
          HTLgen.tbl_to_case_expr
 
-- 
cgit