From fea7ee4d30aa7597ff5b8e2a2954ed452a1a7a57 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Wed, 17 Nov 2021 12:11:12 +0000 Subject: Fix generation of RTLParFU --- src/hls/RTLParFUgen.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/hls/RTLParFUgen.v') diff --git a/src/hls/RTLParFUgen.v b/src/hls/RTLParFUgen.v index 55fe4e7..65ddf74 100644 --- a/src/hls/RTLParFUgen.v +++ b/src/hls/RTLParFUgen.v @@ -57,7 +57,7 @@ Definition transl_instr (res: resources) (cycle: positive) (i: RTLBlockInstr.ins :: FUop po (Op.Ointconst (Int.repr 0)) nil (ram_wr_en r) :: FUop po (Op.Olea addr) args (ram_addr r) :: FUop po (Op.Oshruimm (Int.repr 2)) ((ram_addr r)::nil) (ram_addr r) - :: instr_list, update (cycle+1) + :: instr_list, update (Pos.pred cycle) (add_instr (FUop po Op.Omove (ram_d_out r::nil) d)) d_tree) | _ => Errors.Error (Errors.msg "Could not find RAM") -- cgit