From 5e8e2ae04539121366bb34128f4a9d8bbdf930cc Mon Sep 17 00:00:00 2001 From: Michalis Pardalos Date: Wed, 1 Sep 2021 13:25:58 +0100 Subject: Fix control register ordering in Renaming pass --- src/hls/Renaming.v | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/hls/Renaming.v') diff --git a/src/hls/Renaming.v b/src/hls/Renaming.v index ab14ba4..714c99b 100644 --- a/src/hls/Renaming.v +++ b/src/hls/Renaming.v @@ -143,14 +143,16 @@ Definition renumber_reg_assocmap {A} (regmap : AssocMap.t A) : mon (AssocMap.t A ret (AssocMap_Properties.of_list l). Definition renumber_module (m : HTL.module) : mon HTL.module := - do mod_start' <- renumber_reg (HTL.mod_start m); - do mod_reset' <- renumber_reg (HTL.mod_reset m); - do mod_clk' <- renumber_reg (HTL.mod_clk m); + do mod_params' <- traverselist renumber_reg (HTL.mod_params m); + + do mod_st' <- renumber_reg (HTL.mod_st m); do mod_finish' <- renumber_reg (HTL.mod_finish m); do mod_return' <- renumber_reg (HTL.mod_return m); - do mod_st' <- renumber_reg (HTL.mod_st m); do mod_stk' <- renumber_reg (HTL.mod_stk m); - do mod_params' <- traverselist renumber_reg (HTL.mod_params m); + do mod_start' <- renumber_reg (HTL.mod_start m); + do mod_reset' <- renumber_reg (HTL.mod_reset m); + do mod_clk' <- renumber_reg (HTL.mod_clk m); + do mod_controllogic' <- traverse_ptree1 renumber_stmnt (HTL.mod_controllogic m); do mod_datapath' <- traverse_ptree1 renumber_stmnt (HTL.mod_datapath m); -- cgit