From 0b4808a3705317c96387de036381e4e6add4e956 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 31 Mar 2020 19:40:21 +0100 Subject: Add documentation and fix makefile for Compcert --- src/verilog/HTL.v | 25 +++++++++++++++++++++++++ src/verilog/Verilog.v | 2 +- 2 files changed, 26 insertions(+), 1 deletion(-) (limited to 'src/verilog') diff --git a/src/verilog/HTL.v b/src/verilog/HTL.v index f2620a7..1d156ad 100644 --- a/src/verilog/HTL.v +++ b/src/verilog/HTL.v @@ -1,3 +1,28 @@ +(* + * CoqUp: Verified high-level synthesis. + * Copyright (C) 2020 Yann Herklotz + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + *) + +(** The purpose of the hardware transfer language (HTL) is to create a more + * hardware-like layout that is still similar to the register transfer language + * (RTL) that it came from. The main change is that function calls become + * module instantiations and that we now describe a state machine instead of a + * control-flow graph. + *) + From coqup.common Require Import Coquplib. From compcert Require Import Maps. diff --git a/src/verilog/Verilog.v b/src/verilog/Verilog.v index 50a6809..e91ca2d 100644 --- a/src/verilog/Verilog.v +++ b/src/verilog/Verilog.v @@ -25,7 +25,7 @@ From Coq Require Import From bbv Require Word. -From coqup.common Require Import Helper Coquplib Show. +From coqup.common Require Import Coquplib Show. From compcert Require Integers. -- cgit