From 15c5290ad1c656f7801a8499ae310c8aafa7af09 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Thu, 13 Aug 2020 19:29:03 +0100 Subject: Add FPGA'20 DOI link --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 350cf30..e746bf1 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,7 @@ # Verismith [![Build Status](https://travis-ci.com/ymherklotz/verismith.svg?token=qfBKKGwxeWkjDsy7e16x&branch=master)](https://travis-ci.com/ymherklotz/verismith) +[![FPGA'20 DOI](https://img.shields.io/badge/FPGA'20%20DOI-10.1145%2F3373087.3375310-blue)](https://doi.org/10.1145/3373087.3375310) [![DOI](https://zenodo.org/badge/DOI/10.5281/zenodo.3598790.svg)](https://doi.org/10.5281/zenodo.3598790) Verilog Fuzzer to test the major verilog compilers by generating random, valid and deterministic Verilog. -- cgit