From 1a1b29c8398f089af0c3c57f9f454cb720534722 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 12 Nov 2019 16:50:31 +0000 Subject: Remove second trigger for always block --- data/cells_cyclone_v.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/data/cells_cyclone_v.v b/data/cells_cyclone_v.v index 4fcd49d..ad8b977 100644 --- a/data/cells_cyclone_v.v +++ b/data/cells_cyclone_v.v @@ -220,7 +220,7 @@ module dffeas (d, clk, ena, clrn, prn, aload, asdata, sclr, sload, devclrn, devp output reg q = 0; - always @(posedge clk or posedge aload) begin + always @(posedge clk) begin if (sclr == 1'b1) q <= 0; else if (aload == 1'b1) -- cgit