From 2d5a02e645e580c5f90f98dc70388f4586a0fb42 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Thu, 7 Feb 2019 18:13:12 +0000 Subject: Fix bracket error --- app/Simulation.hs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/app/Simulation.hs b/app/Simulation.hs index 91dec33..c5ae952 100644 --- a/app/Simulation.hs +++ b/app/Simulation.hs @@ -88,12 +88,12 @@ runEquivalence gm t i = do catch_sh (runSim (Icarus "iverilog" "vvp") m rand >>= (\b -> echoP ("RTL Sim: " <> showBS b))) $ onFailure n - catch_sh (runSimWithFile (Icarus "iverilog" "vvp") "syn_yosys.v" rand - --AZZZZZZZZZQaa-- >>= (\b -> echoP ("Yosys Sim1q``````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````````q-a----------aaaaaaaaaa: " <> showBS b))) $ - onFailure n - catch_sh (runSimWithFile (Icarus "iverilog" "vvp") "syn_xst.v" rand - >>= (\b -> echoP ("XST Sim: " <> showBS b))) $ - onFailure n +-- catch_sh (runSimWithFile (Icarus "iverilog" "vvp") "syn_yosys.v" rand +-- >>= (\b -> echoP ("Yosys Sim: " <> showBS b))) $ +-- onFailure n +-- catch_sh (runSimWithFile (Icarus "iverilog" "vvp") "syn_xst.v" rand +-- >>= (\b -> echoP ("XST Sim: " <> showBS b))) $ +-- onFailure n cd ".." rm_rf $ fromText n when (i < 5) (runEquivalence gm t $ i+1) -- cgit