From 9a27120e9163d310ca920b5f8b3bdd266674e09b Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 18 May 2021 18:29:17 +0100 Subject: Add configuration for EMI testing --- src/Verismith/Config.hs | 36 +++++++++++++++++++++++++++++++++++- src/Verismith/EMI.hs | 33 +++++++++++++++++++++++---------- 2 files changed, 58 insertions(+), 11 deletions(-) diff --git a/src/Verismith/Config.hs b/src/Verismith/Config.hs index 8a8f90c..b1841b7 100644 --- a/src/Verismith/Config.hs +++ b/src/Verismith/Config.hs @@ -31,6 +31,9 @@ module Verismith.Config -- *** Module ProbMod (..), + -- ** EMI Configuration + ConfEMI(..), + -- ** ConfProperty ConfProperty (..), @@ -46,10 +49,13 @@ module Verismith.Config fromVivado, fromQuartus, fromQuartusLight, + configEMI, configProbability, configProperty, configSimulators, configSynthesisers, + confEMIGenerateProb, + confEMINoGenerateProb, probModItem, probMod, probModDropOutput, @@ -240,6 +246,14 @@ data Probability } deriving (Eq, Show) +data ConfEMI + = ConfEMI + { -- | Probability of generating a new EMI statement with a new EMI entry. + _confEMIGenerateProb :: {-# UNPACK #-} !Int, + _confEMINoGenerateProb :: {-# UNPACK #-} !Int + } + deriving (Eq, Show) + -- | @[property]@: properties for the generated Verilog file. data ConfProperty = ConfProperty @@ -310,7 +324,8 @@ data SynthDescription data Config = Config - { _configInfo :: Info, + { _configEMI :: {-# UNPACK #-} !ConfEMI, + _configInfo :: {-# UNPACK #-} !Info, _configProbability :: {-# UNPACK #-} !Probability, _configProperty :: {-# UNPACK #-} !ConfProperty, _configSimulators :: [SimDescription], @@ -328,6 +343,8 @@ $(makeLenses ''ProbMod) $(makeLenses ''Probability) +$(makeLenses ''ConfEMI) + $(makeLenses ''ConfProperty) $(makeLenses ''Info) @@ -380,6 +397,7 @@ fromQuartusLight (QuartusLight a b c) = defaultConfig :: Config defaultConfig = Config + (ConfEMI 2 8) (Info (pack $(gitHash)) (pack $ showVersion version)) (Probability defModItem defStmnt defExpr defMod) (ConfProperty 20 Nothing 3 2 5 "random" 10 False 0 1 Nothing) @@ -553,6 +571,18 @@ synthesiser = <*> Toml.dioptional (Toml.text "output") .= synthOut +emiCodec :: TomlCodec ConfEMI +emiCodec = + ConfEMI + <$> defaultValue + (defaultConfig ^. configEMI . confEMIGenerateProb) + (Toml.int "generate_prob") + .= _confEMIGenerateProb + <*> defaultValue + (defaultConfig ^. configEMI . confEMINoGenerateProb) + (Toml.int "nogenerate_prob") + .= _confEMINoGenerateProb + infoCodec :: TomlCodec Info infoCodec = Info @@ -569,6 +599,10 @@ configCodec :: TomlCodec Config configCodec = Config <$> defaultValue + (defaultConfig ^. configEMI) + (Toml.table emiCodec "emi") + .= _configEMI + <*> defaultValue (defaultConfig ^. configInfo) (Toml.table infoCodec "info") .= _configInfo diff --git a/src/Verismith/EMI.hs b/src/Verismith/EMI.hs index a96496e..6891eda 100644 --- a/src/Verismith/EMI.hs +++ b/src/Verismith/EMI.hs @@ -25,7 +25,7 @@ import qualified Data.Text as T import Hedgehog (Gen, GenT, MonadGen) import qualified Hedgehog as Hog import qualified Hedgehog.Gen as Hog -import qualified Hedgehog.Range as Hog +import qualified Hedgehog.Range as HogR import Data.Maybe (fromMaybe) import Verismith.Config import Verismith.Internal @@ -42,21 +42,30 @@ import qualified Data.Text.IO as T newPort' :: Identifier -> StateGen a Port newPort' ident = do - let p = Port Wire False (Range 1 1) ident + hex <- Identifier . T.toLower . T.pack <$> Hog.list (HogR.constant 10 10) Hog.hexit + let p = Port Wire False (Range 0 0) (ident <> hex) emiContext . _Just . emiNewInputs %= (p :) return p +nstatementEMI :: StateGen a (Maybe (Statement a)) +nstatementEMI = do + config <- ask + Hog.frequency + [ (config ^. configEMI . confEMIGenerateProb, do + s' <- statement + n <- newPort' "emi_" + return (Just (CondStmnt (Id (n^.portName)) (Just s') Nothing))), + (config ^. configEMI . confEMINoGenerateProb, return Nothing) + ] + statementEMI :: Statement a -> StateGen a (Statement a) statementEMI (SeqBlock s) = do - s' <- statement - n <- newPort' "x" - let s'' = CondStmnt (Id "x") (Just s') Nothing - return $ SeqBlock (s'' : s) -statementEMI (EventCtrl e (Just s)) = EventCtrl e . Just <$> (statementEMI s) + s'' <- nstatementEMI + return $ SeqBlock ((s'' ^.. _Just) ++ s) statementEMI s = return s moditemEMI :: ModItem a -> StateGen a (ModItem a) -moditemEMI (Always s) = Always <$> statementEMI s +moditemEMI (Always s) = Always <$> transformM statementEMI s moditemEMI m = return m genEMI :: (ModDecl a) -> StateGen a (ModDecl a) @@ -64,6 +73,9 @@ genEMI (ModDecl mid outp inp itms params) = do itms' <- traverse moditemEMI itms return (ModDecl mid outp inp itms' params) +initNewRegs :: [Port] -> ModDecl a -> ModDecl a +initNewRegs ps m = m & modItems %~ (++ (Decl (Just PortIn) <$> ps <*> pure Nothing)) + -- | Procedural generation method for random Verilog. Uses internal 'Reader' and -- 'State' to keep track of the current Verilog code structure. proceduralEMI :: ModDecl a -> Config -> Gen (ModDecl a) @@ -73,8 +85,9 @@ proceduralEMI moddecl config = do runStateT (Hog.distributeT (runReaderT (genEMI moddecl) config)) context - let mainMod' = mainMod & modInPorts %~ (++ (st ^. emiContext . _Just . emiNewInputs)) - return mainMod' + let addMod = modInPorts %~ ((st ^. emiContext . _Just . emiNewInputs) ++ ) + let initMod = initNewRegs (st ^. emiContext . _Just . emiNewInputs) + return (initMod $ addMod mainMod) where context = Context [] [] [] [] [] [] 0 (confProp propStmntDepth) (confProp propModDepth) True -- cgit