From 6610c9a341c568ea369049a7a3d33b64ab4f2815 Mon Sep 17 00:00:00 2001
From: Yann Herklotz <ymherklotz@gmail.com>
Date: Mon, 31 Dec 2018 19:36:23 +0100
Subject: Add show instance and add concat to reglval

---
 src/Test/VeriFuzz/Verilog/Arbitrary.hs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/Test/VeriFuzz/Verilog/Arbitrary.hs')

diff --git a/src/Test/VeriFuzz/Verilog/Arbitrary.hs b/src/Test/VeriFuzz/Verilog/Arbitrary.hs
index 5f30b73..1bcb727 100644
--- a/src/Test/VeriFuzz/Verilog/Arbitrary.hs
+++ b/src/Test/VeriFuzz/Verilog/Arbitrary.hs
@@ -144,7 +144,7 @@ instance QC.Arbitrary ModConn where
 instance QC.Arbitrary ConstExpr where
   arbitrary = ConstExpr <$> positiveArb
 
-instance QC.Arbitrary RegLVal where
+instance QC.Arbitrary LVal where
   arbitrary = QC.oneof [ RegId <$> QC.arbitrary
                        , RegExpr <$> QC.arbitrary <*> QC.arbitrary
                        , RegSize <$> QC.arbitrary <*> QC.arbitrary <*> QC.arbitrary
-- 
cgit