From cccb665ebac6e916c4f961eacbe11a9af7d7ceb3 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Thu, 29 Aug 2019 15:44:33 +1000 Subject: Change name from VeriFuzz to VeriSmith --- src/VeriFuzz/Circuit.hs | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'src/VeriFuzz/Circuit.hs') diff --git a/src/VeriFuzz/Circuit.hs b/src/VeriFuzz/Circuit.hs index 6083c8e..aee0d57 100644 --- a/src/VeriFuzz/Circuit.hs +++ b/src/VeriFuzz/Circuit.hs @@ -1,5 +1,5 @@ {-| -Module : VeriFuzz.Circuit +Module : VeriSmith.Circuit Description : Definition of the circuit graph. Copyright : (c) 2018-2019, Yann Herklotz License : BSD-3 @@ -10,7 +10,7 @@ Portability : POSIX Definition of the circuit graph. -} -module VeriFuzz.Circuit +module VeriSmith.Circuit ( -- * Circuit Gate(..) , Circuit(..) @@ -26,13 +26,13 @@ module VeriFuzz.Circuit where import Control.Lens -import Hedgehog (Gen) -import qualified Hedgehog.Gen as Hog -import VeriFuzz.Circuit.Base -import VeriFuzz.Circuit.Gen -import VeriFuzz.Circuit.Random -import VeriFuzz.Verilog.AST -import VeriFuzz.Verilog.Mutate +import Hedgehog (Gen) +import qualified Hedgehog.Gen as Hog +import VeriSmith.Circuit.Base +import VeriSmith.Circuit.Gen +import VeriSmith.Circuit.Random +import VeriSmith.Verilog.AST +import VeriSmith.Verilog.Mutate fromGraph :: Gen ModDecl fromGraph = do -- cgit