From 0636119cb5faf8e55a4a17bb00d15d6710679c35 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 22 Jan 2019 19:01:44 +0000 Subject: Better multithreading --- src/VeriFuzz/Simulator/Xst.hs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/VeriFuzz/Simulator/Xst.hs') diff --git a/src/VeriFuzz/Simulator/Xst.hs b/src/VeriFuzz/Simulator/Xst.hs index 415a45e..03c1707 100644 --- a/src/VeriFuzz/Simulator/Xst.hs +++ b/src/VeriFuzz/Simulator/Xst.hs @@ -42,10 +42,10 @@ runSynthXst sim m outf = do writefile xstFile $ xstSynthConfig m writefile prjFile [st|verilog work "rtl.v"|] writefile "rtl.v" $ genSource m - timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile] - run_ (netgenPath sim) - ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] - run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf] + noPrint $ timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile] + noPrint $ run_ (netgenPath sim) + ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] + noPrint $ run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf] where modFile = fromText $ modName m xstFile = modFile <.> "xst" -- cgit