From d60fc9c882f6ce668123fbfbfd9a0f02dd832f7b Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sun, 20 Jan 2019 16:49:17 +0000 Subject: Prettify files --- src/VeriFuzz/Simulator/Xst.hs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/VeriFuzz/Simulator/Xst.hs') diff --git a/src/VeriFuzz/Simulator/Xst.hs b/src/VeriFuzz/Simulator/Xst.hs index 2314dd1..415a45e 100644 --- a/src/VeriFuzz/Simulator/Xst.hs +++ b/src/VeriFuzz/Simulator/Xst.hs @@ -37,16 +37,16 @@ defaultXst :: Xst defaultXst = Xst "/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xst" "/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/netgen" --- brittany-disable-next-binding runSynthXst :: Xst -> ModDecl -> FilePath -> Sh () runSynthXst sim m outf = do writefile xstFile $ xstSynthConfig m writefile prjFile [st|verilog work "rtl.v"|] writefile "rtl.v" $ genSource m timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile] - run_ (netgenPath sim) ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] + run_ (netgenPath sim) + ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf] - where - modFile = fromText $ modName m - xstFile = modFile <.> "xst" - prjFile = modFile <.> "prj" + where + modFile = fromText $ modName m + xstFile = modFile <.> "xst" + prjFile = modFile <.> "prj" -- cgit