From e723490f029e57d479c4d1103e5df4274c6c0bed Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sat, 11 May 2019 21:52:11 +0100 Subject: Add Quote export to main module --- src/VeriFuzz/Verilog.hs | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/VeriFuzz/Verilog.hs') diff --git a/src/VeriFuzz/Verilog.hs b/src/VeriFuzz/Verilog.hs index 701a7d6..399159f 100644 --- a/src/VeriFuzz/Verilog.hs +++ b/src/VeriFuzz/Verilog.hs @@ -99,6 +99,8 @@ module VeriFuzz.Verilog -- * Useful Lenses and Traversals , getModule , getSourceId + -- * Quote + , verilog ) where @@ -106,3 +108,4 @@ import VeriFuzz.Verilog.AST import VeriFuzz.Verilog.CodeGen import VeriFuzz.Verilog.Gen import VeriFuzz.Verilog.Parser +import VeriFuzz.Verilog.Quote -- cgit