From 931b1a60643f50768eb33903e87a7471898835db Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 23 Apr 2019 10:11:27 +0100 Subject: Add event list generation for always blocks --- src/VeriFuzz/Verilog/CodeGen.hs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/VeriFuzz/Verilog/CodeGen.hs') diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs index 361d27e..e31866c 100644 --- a/src/VeriFuzz/Verilog/CodeGen.hs +++ b/src/VeriFuzz/Verilog/CodeGen.hs @@ -146,7 +146,7 @@ expr (Str t ) = "\"" <> t <> "\"" showNum :: BitVec -> Text showNum (BitVec s n) = - "(" <> minus <> showT s <> "'h" <> T.pack (showHex (abs n) "") <> ")" + minus <> showT s <> "'h" <> T.pack (showHex (abs n) "") where minus | signum n >= 0 = "" | otherwise = "-" @@ -211,7 +211,7 @@ event a = "@(" <> eventRec a <> ")" eventRec :: Event -> Text eventRec (EId i) = getIdentifier i eventRec (EExpr e) = expr e -eventRec EAll = "@*" +eventRec EAll = "*" eventRec (EPosEdge i) = "posedge " <> getIdentifier i eventRec (ENegEdge i) = "negedge " <> getIdentifier i eventRec (EOr a b) = "(" <> eventRec a <> " or " <> eventRec b <> ")" -- cgit