From c31961da322d9700fd6604541cbce5a4042f9b24 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sun, 5 May 2019 16:54:27 +0100 Subject: Add seeds for reproducible runs --- src/VeriFuzz/Verilog/CodeGen.hs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/VeriFuzz/Verilog/CodeGen.hs') diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs index 2cd2b13..af255a2 100644 --- a/src/VeriFuzz/Verilog/CodeGen.hs +++ b/src/VeriFuzz/Verilog/CodeGen.hs @@ -138,7 +138,7 @@ expr (BinOp eRhs bin eLhs) = "(" <> expr eRhs <> binaryOp bin <> expr eLhs <> ")" expr (Number b ) = showNum b expr (Id i ) = getIdentifier i -expr (VecSelect i e) = getIdentifier i <> "[" <> genExpr e <> "]" +expr (VecSelect i e) = getIdentifier i <> "[" <> expr e <> "]" expr (RangeSelect i r) = getIdentifier i <> range r expr (Concat c ) = "{" <> comma (expr <$> c) <> "}" expr (UnOp u e ) = "(" <> unaryOp u <> expr e <> ")" -- cgit