From 99fe59abc997ba6f65896a2377881409e257faf9 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Sun, 20 Jan 2019 15:33:13 +0000 Subject: Rename moduleId to modId --- src/VeriFuzz/Verilog/Helpers.hs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/VeriFuzz/Verilog/Helpers.hs') diff --git a/src/VeriFuzz/Verilog/Helpers.hs b/src/VeriFuzz/Verilog/Helpers.hs index 4771329..99e5f38 100644 --- a/src/VeriFuzz/Verilog/Helpers.hs +++ b/src/VeriFuzz/Verilog/Helpers.hs @@ -28,7 +28,7 @@ emptyMod = ModDecl "" [] [] [] -- | Set a module name for a module declaration. setModName :: Text -> ModDecl -> ModDecl -setModName str = moduleId .~ Identifier str +setModName str = modId .~ Identifier str -- | Add a input port to the module declaration. addModPort :: Port -> ModDecl -> ModDecl @@ -67,3 +67,6 @@ defaultPort = Port Wire 1 portToExpr :: Port -> Expr portToExpr (Port _ _ i) = Id i + +modName :: ModDecl -> Text +modName = view $ modId . getIdentifier -- cgit