From 39dfa92affb1271dc6f714dfca0e13ba72e72e24 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 7 Apr 2020 01:31:45 +0100 Subject: Add annotations and make it compile again --- src/Verismith/Tool/Yosys.hs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/Verismith/Tool/Yosys.hs') diff --git a/src/Verismith/Tool/Yosys.hs b/src/Verismith/Tool/Yosys.hs index 3632f37..9f536b7 100644 --- a/src/Verismith/Tool/Yosys.hs +++ b/src/Verismith/Tool/Yosys.hs @@ -39,8 +39,8 @@ import Verismith.Verilog.CodeGen import Verismith.Verilog.Mutate data Yosys = Yosys { yosysBin :: !(Maybe FilePath) - , yosysDesc :: {-# UNPACK #-} !Text - , yosysOutput :: {-# UNPACK #-} !FilePath + , yosysDesc :: !Text + , yosysOutput :: !FilePath } deriving (Eq) -- cgit