From dbdea9bc47513b3643c981043c806647fdcf89b4 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 5 Nov 2019 10:17:31 +0000 Subject: Add reduction pass to remove constants from concat --- src/Verismith/Verilog/AST.hs | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/Verismith/Verilog') diff --git a/src/Verismith/Verilog/AST.hs b/src/Verismith/Verilog/AST.hs index 699d87a..fbe4347 100644 --- a/src/Verismith/Verilog/AST.hs +++ b/src/Verismith/Verilog/AST.hs @@ -524,6 +524,12 @@ data SourceInfo = SourceInfo { _infoTop :: {-# UNPACK #-} !Text } deriving (Eq, Show, Ord, Data, Generic, NFData) +instance Semigroup SourceInfo where + (SourceInfo t v) <> (SourceInfo _ v2) = SourceInfo t $ v <> v2 + +instance Monoid SourceInfo where + mempty = SourceInfo mempty mempty + $(makeLenses ''Expr) $(makeLenses ''ConstExpr) $(makeLenses ''Task) -- cgit